參數(shù)資料
型號: MT933
廠商: Zarlink Semiconductor Inc.
英文描述: 3.3V 10/100 Fast Ethernet Transceiver to MII
中文描述: 3.3 10/100快速以太網(wǎng)收發(fā)器,以信息產(chǎn)業(yè)部
文件頁數(shù): 17/20頁
文件大?。?/td> 360K
代理商: MT933
16
MT933
Figure 7 External Components
EXTERNAL COMPONENTS
Connecting an External 25MHz Reference
If an external clock is used then it should be driven
into the REFCLK input, and XTAL1 must be connected
to ground. XTAL2 must be left unconnected. If a
crystal is used, REFCLK must be connected to ground.
RESETN Pull-up Resistor
This resistor is required regardless of whether or not
RESETN is used externally.
RX Input Decoupling
The method of using a split input load resistor and
de-coupling the centre tap reduces common mode
noise.
Crystal Oscillator
For IEEE802.3 compliance the oscillator must run at
25MHz
±
100ppm. The MT933 on-chip circuitry
contributes less than 40ppm variability to the oscillator
frequency, therefore the crystal must be specified to
60ppm. This must include variations due to
temperature and ageing. The crystal must be capable
of dissipating 0.5mW of power.
External capacitors are required on the XTAL1 &
XTAL2 pins. Manufacturer's recommendations should
be followed.
Tracking to the crystal and the capacitors must be as
short as possible. Other signal paths must not cross
the area.
The MT933 is supported by the following magnetics:
VENDOR
Pulse
MAGNETICS
H1119
T
T
T
T
T
R
R
R
R
R
D
R
D
R
C
C
P
R
R
R
R
A
T
T
T
T
T
T
P
P
P
S
SUBGND2
TX_ER
DGND1
TX_EN
LNKST
ACTST
COLST
DVDD1
RXVDD3
RXGND3
FDST
SPDST
PA4
RESETN
RXVDD2
RXGND2
5K(5%)
10K(5%)
Vdd
Vdd
Vdd
Vdd
Vdd
Vdd
MINT
DVDD3
MDC
MDIO
DGND3
RefCLK
OSCVDD
XTAL1
XTAL2
OSCGND
TXCGND4
TXVDD4
TXREF100
TXREF10
TXVDD3
TXGND3
25MHz
C2
C2
1.24K
1%
1.24K
1%
24.9 (1%)
24.9 (1%)
10
0.01
μ
F
30 (1%)
30 (1%)
20 (1%)20 (1%)
R
0.01
μ
F
R
T
T
T
1:
2 MAGNETICS
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