參數(shù)資料
型號： MT9300B
廠商： Zarlink Semiconductor Inc.
英文描述： Multi-Channel Voice Echo Canceller
中文描述： 多通道語音回聲消除器
文件頁數(shù)： 23/39頁
文件大?。?/td> 629K
代理商： MT9300B
MT9300B
Data Sheet
23
Zarlink Semiconductor Inc.
FD
7
FD
6
FD
5
FD
4
FD
2
FD
1
FD
0
FD
3
Power Reset Value
00H
7
6
5
4
3
2
1
0
Echo Canceller A, Flat Delay Register (FD)
Echo Canceller B, Flat Delay Register (FD)
Read/Write Address: 04
H
+ Base Address
Read/Write Address: 24
H
+ Base Address
Power Reset Value
00H
7
6
5
4
3
2
1
0
NS
7
NS
6
NS
5
NS
4
NS
2
NS
1
NS
0
NS
3
Echo Canceller A, Decay Step Number Register (NS)
Echo Canceller B, Decay Step Number Register (NS)
Read/Write Address: 07
H
+ Base Address
Read/Write Address: 27
H
+ Base Address
Power Reset Value
04H
7
6
5
4
3
2
1
0
0
0
0
0
SSC
2
SSC
1
SSC
0
0
Echo Canceller A, Decay Step Size Control Register (SSC)
Echo Canceller B, Decay Step Size Control Register (SSC)
Read/Write Address: 06
H
+ Base Address
Read/Write Address: 26
H
+ Base Address
Note: Bits marked with “0” are reserved bits and should be written “0”.
Amplitude of MU
Time
Flat Delay (FD
7-0
)
Step Size (SS)
1.0
2
-16
FIR Filter Length (512 or 1024 taps)
Number of Steps (NS
7-0
)
The Exponential Decay registers (Decay Step Number and Decay Step Size) and Flat Delay register allow the LMS adaptation step-
size (MU) to be programmed over the length of the FIR filter. A programmable MU profile allows the performance of the echo
canceller to be optimized for specific applications. For example, if the characteristic of the echo response is known to have a flat
delay of several milliseconds and a roughly exponential decay of the echo impulse response, then the MU profile can be
programmed to approximate this expected impulse response thereby improving the convergence characteristics of the Adaptive
Filter. Note that in the following register descriptions, one tap is equivalent to 125
μ
s (64 ms/512 taps).
FD
7-0
Flat Delay
: This register defines the flat delay of the MU profile, (i.e., where the MU value is 2
-16
). The delay is defined as
FD
7-0
x 8 taps. For example; if FD
7-0
= 5, then MU=2
-16
for the first 40 taps of the echo canceller FIR filter. The valid range
of FD
7-0
is: 0 ￡ FD
7-0
￡ 64 in normal mode and 0 ￡ FD
7-0
￡ 128 in extended-delay mode.
The default value of FD
7-0
is zero.
SSC
2-0
Decay Step Size Control
: This register controls the step size (SS) to be used during the exponential decay of MU. The
decay rate is defined as a decrease of MU by a factor of 2 every SS taps of the FIR filter, where
SS = 4 x2
SSC
2-0
. For
example; If SSC
2-0
= 4, then MU is reduced by a factor of 2 every 64 taps of the FIR filter.
The default value of SSC
2-0
is
04h.
NS
7-0
Decay Step Number
: This register defines the number of steps to be used for the decay of MU where each step has a period
of SS taps (see SSC
2-0
). The start of the exponential decay is defined as:
Filter Length (512 or 1024) - [Decay Step Number (NS
7-0
) x Step Size (SS)]
where
SS = 4 x2
SSC
2-0
.
For example, if NS
7-0
=4 and SSC
2-0
=4, then the exponential decay start value is
512 - [NS
7-0
x SS] = 512 - [4 x (4x2
4
)] = 256
taps for a filter length of 512 taps.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT9300BL 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel Voice Echo Canceller
MT9300BV 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel Voice Echo Canceller
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MT9315AE 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:CMOS Acoustic Echo Canceller
MT9315AP 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:CMOS Acoustic Echo Canceller
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