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參數(shù)資料
| 型號： | MT9171AP |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | ISO2-CMOS ST-BUS⑩ FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit |
| 中文描述： | ISO2 -意法半導(dǎo)體的CMOS總線⑩家庭數(shù)字用戶接口電路的數(shù)字網(wǎng)絡(luò)接口電路 |
| 文件頁數(shù)： | 9/25頁 |
| 文件大?。?/td> | 401K |
| 代理商： | MT9171AP |
Advance Information
MT9171/72
9-123
the C-channel and D-Channel also at 80 or 160
kbit/s.
In DN mode, both the DV and CD ports operate as
ST-BUS streams at 2.048 Mbit/s. The DV port
transfers data over pins DSTi and DSTo while on the
CD port, the CDSTi and CDSTo pins are used. The
SINGL port option only exists in DN mode.
In MOD mode, DUAL port operation must be used
and the D, B1 and B2 channel designations no
longer exist. The selection of SLV or MAS will
determine which of the DNICs is using the externally
supplied clock and which is phase locking to the data
on the line. Due to jitter and end to end delay, one
end must be the master to generate all the timing for
the link and the other must extract the timing from
the receive data and synchronize itself to this timing
in order to recover the synchronous data. DUAL port
mode allows the user to use two separate serial
busses: the DV port for PCM/data (B channels) and
the CD port for control and signalling information (C
and D channels). In the SINGL port mode, all four
channels are concatenated into one serial stream
and input to the DNIC via the DV port. The order of
the C and D channels may be changed only in DN/
DUAL mode. The DNIC may be configured to transfer
the D-channel in channel 0 and the C-channel in
Table 2. Mode Definitions
Table 3. Pin Configurations
Mode
Function
SLV
SLAVE
-
The chip timebase is extracted from the received line data and the external 10.24 MHz
crystal is phase locked to it to provide clocks for the entire device and are output for the external
system to synchronize to.
MASTER
-
The timebase is derived from the externally supplied data clocks and 10.24 MHz clock
which must be frequency locked. The transmit data is synchronized to the system timing with the
receive data recovered by a clock extracted from the receive data and resynchronized to the system
timing.
DUAL PORT
-
Both the CD and DV ports are active with the CD port transferring the C&D channels
and the DV port transferring the B1& B2 channels.
SINGLE PORT -
The B1& B2, C and D channels are all transferred through the DV port. The CD
port is disabled and CDSTi should be pulled high.
MODEM
-
Baseband operation at 80 or 160 kbits/s. The line data is received and transmitted
through the DV port at the baud rate selected. The C-channel is transferred through the CD port
also at the baud rate and is synchronized to the CLD output.
DIGITAL NETWORK
-
Intended for use in the digital network with the DV and CD ports operating at
2.048 Mbits/s and the line at 80 or 160 kbits/s configured according to the applicable ISDN
recommendation.
D BEFORE C-CHANNEL
-
The D-channel is transferred before the C-channel following F0.
C BEFORE D-CHANNEL
-
The C-channel is transferred before the D-channel following F0.
OUTPUT DATA ENABLE
-
When mode 7 is selected, the DV and CD ports are put in high
impedance state. This is intended for power-up reset to avoid bus contention and possible damage
to the device during the initial random state in a daisy chain configuration of DNICs. In all the other
modes of operation DV and CD ports are enabled during the appropriate channel times.
MAS
DUAL
SINGL
MOD
DN
D-C
C-D
ODE
Mode
#
F0/CLD
F0o/RCK
C4/TCK
Name
Input/Output
Name
Input/Output
Name
Input/Output
0
1
2
3
4
5
6
7
F0
CLD
F0
F0
F0
CLD
F0
F0
Input
Output
Input
Input
Output
Output
Output
Input
F0o
RCK
F0o
F0o
F0o
RCK
F0o
F0o
Output
Output
Output
Output
Output
Output
Output
Output
C4
TCK
C4
C4
C4
TCK
C4
C4
Input
Output
Input
Input
Output
Output
Output
Input
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