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參數(shù)資料
| 型號(hào)： | MT9045 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | T1/E1/OC3 System Synchronizer(T1/E1/OC3 系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）) |
| 中文描述： | T1/E1/OC3系統(tǒng)同步器（T1/E1/OC3系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）） |
| 文件頁數(shù)： | 2/25頁 |
| 文件大?。?/td> | 104K |
| 代理商： | MT9045 |
MT9045
Advance Information
2
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description
1,10,
23,31
V
SS
Ground.
0 Volts. (Vss pads).
2
RST
Reset (Input).
A logic low at this input resets the MT9045. To ensure proper operation, the
device must be reset after reference signal frequency changes and power-up. The RST pin
should be held low for a minimum of 300ns. While the RST pin is low, all frame and clock
outputs are at logic high. Following a reset, the input reference source and output clocks and
frame pulses are phase aligned as shown in Figure 12.
3
TCLR
TIE Circuit Reset (Input).
A logic low at this input resets the Time Interval Error (TIE)
correction circuit resulting in a realignment of input phase with output phase as shown in
Figure 12. The TCLR pin should be held low for a minimum of 300ns. This pin is internally
pulled down to VSS.
4
SECOOR
Secondary Reference Out Of Capture Range (Output).
A logic high at this pin indicates
that the secondary reference is off the nominal frequency by more than
±
17 ppm.
SEC
Secondary Reference (Input).
This is one of two (PRI & SEC) input reference sources
(falling edge) used for synchronization. One of four possible frequencies (8kHz, 1.544MHz,
2.048MHz or 19.44MHz) may be used. The selection of the input reference is based upon the
MS1, MS2, RSEL, and PCCi control inputs.This pin is internally pulled up to V
DD
.
PRI
Primary Reference (Input).
See pin description for SEC. This pin is internally pulled up to
V
DD
.
V
DD
Positive Supply Voltage.
+3.3V
DC
nominal.
5
6
7,17
28,35
8
OSCo
Oscillator Master Clock (CMOS Output).
connected from this pin to OSCi, see Figure 9. For clock oscillator operation, this pin is left
unconnected, see Figure 8.
For crystal operation, a 20MHz crystal is
9
OSCi
Oscillator Master Clock (CMOS Input).
For crystal operation, a 20MHz crystal is
connected from this pin to OSCo, see Figure 9. For clock oscillator operation, this pin is
connected to a clock source, see Figure 8.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
TRST
TDI
TDO
PRIOOR
IC
FS1
FS2
IC
RSEL
MS1
MS2
Vdd
IC
IC
NC
Vss
PCCi
HOLDOVER
Vdd
C6o
C16o
RST
TCLR
SECOOR
SEC
PRI
Vdd
OSCo
OSCi
Vss
F16o
F0o
TSP
F8o
C1.5o
Vdd
LOCK
C2o
C4o
C19o
FLOCK
48
TMS
TCK
V
SS
Vss
IC
C8o
RSP
SSOP
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9045AN | 制造商:Microsemi Corporation 功能描述: |
| MT9045AN1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Rail/Tube 制造商:Microsemi Corporation 功能描述:T1/E1/OC3 SYSTEM SYNCHRONIZER |
| MT9045ANR1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Tape and Reel 制造商:Microsemi Corporation 功能描述:iB FREE T1/E1/OC3 SYSTEM SYNCHRONIZER 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Tape and Reel |
| MT9046 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH Clock Multiplier PLL |
| MT9046AN | 制造商:Microsemi Corporation 功能描述: |
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