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參數(shù)資料
| 型號(hào)： | MT90221 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad IMA/UNI PHY Device |
| 中文描述： | 四IMA的/單向物理層設(shè)備 |
| 文件頁(yè)數(shù)： | 30/114頁(yè) |
| 文件大小： | 304K |
| 代理商： | MT90221 |
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MT90221
22
3.3.11 RX IMA Group Start-Up
A quick initialization sequence for the RX IMA Group
could be as follows (default values can be used for
some registers)
(Note: The startup procedure below is given
indicating the most important steps. A more detailed
and complete sequence can be found in the
MT90220/221 Programmer’s Manual and example
code).
Configure the SRAM parameters using the
SRAM Control, RX External SRAM Control
and
Test Mode Enable
registers
Configure the Cell delineation and IMA Frame
State Machines parameters by writing to the
Cell Delineation, Loss Cell Delineation
and
IMA Frame Delineation
registers
Write to the
RX Link Control
register to select
the RX options
Configure the RX PCM port(s) by writing to the
register
Configure the RX UTOPIA port by writing to the
UTOPIA Output Group PHY Enable
and
UTOPIA OutputGroup Address
registers
Validate the IMA parameter values received
over the PCM links and configure the link in IMA
mode using the
RX Recombiner
and the
RX
Link Control
register
When ready, start the recombiner process by
writing to the
RX Recombiner
register
3.3.12 Link Addition
The MT90221 supports software controlled link
addition to the existing RX link group. Such an
addition can be used to increase available
bandwidth. The added link receives Filler cells until
the Far End (FE) TX side is active. During this time,
the new link’s delay is measured and compared with
the current operating limits. The link is either rejected
or accepted. The operational delay can be corrected
if required as described in 3.3.10.6 Incrementing/
Decrementing
the
Recombiner
synchronization is achieved, the added link can be
included in the recombiner algorithm using bit 2 of
the
RX Recombiner
register. The link will be
effectively included in the IMA Group when the
corresponding bit in the
Enable Recombination
Status
register is set.
Delay.
After
A link may also be added to an IMA Group when the
first User cell is received. This is done by writing to
the
RX Recombiner Delay Control
register.
3.3.13 Link Deletion
There are two reasons to deactivate a link:
the bandwidth required decreases or
Both link deactivation procedures specified in the
IMA specification are supported under the control of
software.
an existing link becomes faulty.
The command to disable the recombination process
for a link is issued by writing to bit 2 of the
RX
Recombiner
register.
If the delay of the link to be removed is not the worst
delay, then no pointer correction is required and the
recombiner bit (i.e., bit 2 of
RX Recombiner
register)
for the removed link should be set to 0.
If it is the worst case delay, then the pointer values
should be corrected to reduce the amount of
additional delay introduced by the recombiner. The
pointers need to be changed (advanced). This
results in reducing the number of cells (the amount
of time) required for the recombiner process.
To reduce the impact of this correction, its
implementation can either be immediate or delayed.
A command in the
Increment/Decrement Delay
Control
register is used for this purpose (refer to
3.3.10.6
Incrementing/Decrementing
Recombiner Delay, for more details).
the
3.3.14 Disabling an IMA Group
Before an IMA Group can be disabled, the software
should ensure that no User cells are left in memory.
As part of the higher level handshaking, the TX FE
should have sent Filler cells for a while for the RX
side to process all the User cells that could be in the
external memory.
The procedure to follow is to stop the recombination
process and then, wait for the enable process to be
reported inactive (in the
Enable Recombination
Status
register) before re-assigning the link to
another IMA group or to UNI Mode.
3.4
Up to four incoming T1/E1 lines can be connected to
the MT90221 receiver and forwarded to the UTOPIA
L2 interface served by an external ATM-Layer device
in UNI Mode. Figure 8 illustrates four of the eight
possible UTOPIA ports that can be addressed
through the UTOPIA Interface.
The ATM Receive Path in UNI
The size of the RX UTOPIA FIFO is fixed. The Idle
cells are automatically removed at the RX PCM block
and all other valid received cells are transferred to
the RX UTOPIA FIFO.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90221AL | Quad IMA/UNI PHY Device |
| MT9041B | T1/E1 System Synchronizer |
| MT9041BP | T1/E1 System Synchronizer |
| MT9041 | Multiple Output Trunk PLL |
| MT9041AP | IC REG LDO 150MA 5.0V 0.5% 8SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90221AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90222 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4/8/16 Port IMA/TC PHY Device |
| MT90222AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA - Trays |
| MT90222AG2 | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA /BAKE/DRYPACK - Trays |
| MT90223AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 80MBPS 2.5V 384BGA - Trays |
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