參數(shù)資料
型號: MT8985AL
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 路由/交換
英文描述: Enhanced Digital Switch
中文描述: TELECOM, DIGITAL TIME SWITCH, PQFP44
封裝: 10 X 10 MM, 2 MM HEIGHT, MO-112AA-1, MQFP-44
文件頁數(shù): 17/26頁
文件大?。?/td> 568K
代理商: MT8985AL
MT8985
Data Sheet
17
Zarlink Semiconductor Inc.
Figure 12 - Output Test Load
Timing is over recommended temperature & power supply voltages (V
=5V
±
5%, V
=0V, T
=–40 to 85
°
C).
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
AC Electrical Characteristics
- ST-BUS Timing -
Voltages are with respect to ground (VSS) unless otherwise stated.
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
Frame Pulse width
t
F0iW
244
ns
2
Frame Pulse setup time
t
F0iS
10
190
ns
3
Frame Pulse hold time
t
F0iH
20
190
ns
4
STo delay Active to Active
t
DAA
45
100
ns
C
L
=150 pF
5
STi setup time
t
STiS
20
ns
6
STi hold time
t
STiH
t
C4i
20
ns
7
Clock period
200
244
300
ns
8
CK Input Low
t
CL
t
CH
85
122
150
ns
9
CK Input High
85
122
150
ns
10 Clock Rise/Fall Time
t
r,
t
f
10
ns
Output
Pin
Test Point
C
L
V
SS
S1
R
L
V
DD
S2
V
SS
S1 is open circuit except
when testing output levels
or high impedance states.
S2 is switched to V
or
V
SS
when testing output
levels or high impedance
states.
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