參數(shù)資料
型號: MT8981DP1
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 路由/交換
英文描述: ISO-CMOS ST-BUS
中文描述: TELECOM, DIGITAL TIME SWITCH, PQCC44
封裝: LEAD FREE, PLASTIC, MS-018AC, LCC-44
文件頁數(shù): 6/20頁
文件大?。?/td> 481K
代理商: MT8981DP1
MT8981D
Data Sheet
6
Zarlink Semiconductor Inc.
Figure 4 - Control Register Bits
Bit
Name
Description
7
Split Memory
When 1, all subsequent reads are from the Data Memory and writes are to the Connection Memory
Low, except when the Control Register is accessed again. When 0, the Memory Select bits specify
the memory for subsequent operations. In either case, the Stream Address Bits select the subsection
of the memory which is made available.
6
Message
Mode
When 1, the contents of the Connection Memory Low are output on the Serial Output streams
except when the ODE pin is low. When 0, the Connection Memory bits for each channel determine
what is output.
5
(unused)
4-3
Memory
Select Bits
0-0 - Not to be used
0-1 - Data Memory (read only from the microprocessor port)
1-0 - Connection Memory Low
1-1 - Connection Memory High
2
(unused)
Must be a 0.
1-0
Stream
Address Bits
The number expressed in binary notation on these bits refers to the input or output ST-BUS stream
which corresponds to the subsection of memory made accessible for subsequent operations.
7
6
5
4
3
2
1
0
Mode
Control
Bits
(unused)
Memory
Select
Bits
Stream
Address
Bits
(unused)
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