參數(shù)資料
型號: MT80C51C-20R
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP44
文件頁數(shù): 42/109頁
文件大小: 10824K
代理商: MT80C51C-20R
286
7593L–AVR–09/12
AT90USB64/128
USB host controller state after an hardware reset is ‘Reset’. When the USB controller is enabled
and the USB Host controller is selected, the USB controller is in ‘Idle’ state. In this state, the
USB Host controller waits for the Device connection, with a minimum power consumption.
The USB Pad should be in Idle mode. The macro does not need to have the PLL activated to
enter in ‘Host Ready’ state.
The Host controller enters in Suspend state when the USB bus is in Suspend state, that is, when
the Host controller doesn’t generate the Start of Frame. In this state, the USB consumption is
minimum. The Host controller exits to the Suspend state when starting to generate the SOF over
the USB line.
24.4
Device detection
A Device is detected by the USB controller when the USB bus if different from D+ and D- low. In
other words, when the USB Host Controller detects the Device pull-up on the D+ line. To enable
this detection, the Host Controller has to provide the Vbus power supply to the Device.
The Device Disconnection is detected by the USB Host controller when the USB Idle correspond
to D+ and D- low on the USB line.
24.5
Pipe selection
Prior to any operation performed by the CPU, the Pipe must first be selected. This is done by
setting PNUM2:0 bits (UPNUM register) with the Pipe number which will be managed by the
CPU.
The CPU can then access to the various Pipe registers and data.
24.6
Pipe configuration
The following flow (see Figure 24-3 on page 287) must be respected in order to activate a Pipe.
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