參數(shù)資料
型號(hào): MT5C2561
廠商: Austin Semiconductor, Inc
英文描述: MT5C2561 SRAM MEMORY ARRAY
中文描述: MT5C2561的SRAM內(nèi)存陣列
文件頁(yè)數(shù): 4/11頁(yè)
文件大?。?/td> 129K
代理商: MT5C2561
SRAM
MT5C2561
Austin Semiconductor, Inc.
MT5C2561
Rev. 2.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55
o
C < T
C
< 125
o
C; V
CC
= 5V +10%)
MIN
MAX
MIN
MAX
UNITS
NOTES
READ CYCLE
READ cycle time
Address access time
Chip Enable access time
Output hold from address change
Chip Enable to output in Low-Z
Chip disable to output in High-Z
Chip Enable to power-up time
Chip disable to power-down time
WRITE CYCLE
WRITE cycle time
Chip Enable to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width
Data setup time
Data hold time
Write disable to output in Low-Z
Write Enable to output in High-Z
t
RC
t
AA
t
ACE
t
OH
t
LZCE
t
HZCE
t
PU
t
PD
35
45
ns
ns
ns
ns
ns
ns
ns
ns
35
35
45
45
3
3
3
3
7
20
20
6, 7
4
4
0
0
35
45
t
WC
t
CW
t
AW
t
AS
t
AH
t
WP
t
DS
t
DH
t
LZWE
t
HZWE
35
30
30
0
5
30
20
0
0
0
45
40
40
0
5
40
20
0
0
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
15
20
6, 7
-35
-45
DESCRIPTION
SYMBOL
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