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參數(shù)資料
| 型號： | MT58L64L32FT-8.5 |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| 中文描述： | 2MB的：128K的× 18，64K的x 32/36流通過SYNCBURST的SRAM |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 488K |
| 代理商： | MT58L64L32FT-8.5 |
10
2Mb: 128K x 18, 64K x 32/36 Flow-Through SyncBurst SRAM
MT58L128L18F_2.p65
–
Rev. 6/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
2Mb: 128K x 18, 64K x 32/36
FLOW-THROUGH SYNCBURST SRAM
I
DD
OPERATING CONDITIONS AND MAXIMUM LIMITS
(Note: 1) (0
°
C
≤
T
A
≤
+70
°
C; V
DD
= +3.3V +0.3V/-0.165V unless otherwise noted)
DESCRIPTION
Power Supply
Current: Operating
CONDITIONS
SYM
TYP
-6.8
-7.5
-8.5
-10
UNITS NOTES
Device selected; All inputs
≤
V
IL
or
≥
V
IH
;
Cycle time
≥
t
KC (MIN);
V
DD
= MAX; Outputs open
Device selected; V
DD
= MAX;
ADSC#, ADSP#, ADV#, GW#, BWx#
≥
V
IH
; All inputs
≤
V
SS
+ 0.2 or
≥
V
DD
- 0.2;
Cycle time
≥
t
KC (MIN); Outputs open
Device deselected; V
DD
= MAX;
All inputs
≤
V
SS
+ 0.2 or
≥
V
DD
- 0.2;
All inputs static; CLK frequency = 0
Device deselected; V
DD
= MAX;
All inputs
≤
V
IL
or
≥
V
IH
;
All inputs static; CLK frequency = 0
Device deselected; V
DD
= MAX;
ADSC#, ADSP#, ADV#, GW#, BWx#
≥
V
IH
; All inputs
≤
V
SS
+ 0.2 or
≥
V
DD
- 0.2;
Cycle time
≥
t
KC (MIN)
I
DD
65
265
245
225
150
mA
2, 3, 4
Power Supply
Current: Idle
I
DD
1
20
70
65
65
50
mA
2, 3, 4
CMOS Standby
I
SB
2
0.5
10
10
10
10
mA
3, 4
TTL Standby
I
SB
3
6
25
25
25
25
mA
3, 4
Clock Running
I
SB
4
20
70
65
65
50
mA
3, 4
MAX
NOTE:
1. V
DD
Q = +3.3V +0.3V/-0.165V for 3.3V I/O configuration; V
DD
Q = +2.5V +0.4V/-0.125V for 2.5V I/O configuration.
2. I
DD
is specified with no output current and increases with faster cycle times. I
DD
Q increases with faster cycle times and
greater output loading.
3.
“
Device deselected
”
means device is in power-down mode as defined in the truth table.
“
Device selected
”
means
device is active (not in power-down mode).
4. Typical values are measured at 3.3V, 25
°
C and 15ns cycle time.
5. V
DD
Q = +3.3V +0.3V/-0.165V for 3.3V I/O configuration; V
DD
Q = +2.5V +0.4V/-0.125V for 2.5V I/O configuration.
6. I
DD
is specified with no output current and increases with faster cycle times. I
DD
Q increases with faster cycle times and
greater output loading.
7.
“
Device deselected
”
means device is in power-down mode as defined in the truth table.
“
Device selected
”
means
device is active (not in power-down mode).
8. Typical values are measured at 3.3V, 25
°
C, and 15ns cycle time.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT58L64L32PT-10 | 制造商:Cypress Semiconductor 功能描述: 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT58L64L32PT-10 TR | 制造商:Cypress Semiconductor 功能描述:64KX32 SRAM PLASTIC TQFP 3.3V |
| MT58L64L32PT-10TR | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| MT58L64L32PT-6 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT58L64L32PT-6 TR | 制造商:Cypress Semiconductor 功能描述:64KX32 SRAM PLASTIC TQFP 3.3V |
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