參數(shù)資料
型號: MT58L32L36D
廠商: Micron Technology, Inc.
英文描述: 32K x 36,3.3V I/O, Pipelined, DCD SyncBurst SRAM(1Mb,3.3V輸入/輸出,流水線式,雙循環(huán)取消選擇,同步脈沖靜態(tài)存儲器)
中文描述: 32KX8的36,3.3六/ O的流水線,雙氰胺SyncBurst的SRAM(1兆,3.3V的輸入/輸出,流水線式,雙循環(huán)取消選擇,同步脈沖靜態(tài)存儲器)
文件頁數(shù): 12/17頁
文件大小: 326K
代理商: MT58L32L36D
1Mb: 64K x 18, 32K x 32/36 3.3V I/O, Pipelined, DCD SyncBurst SRAM
MT58L64L18D.p65 – Rev. 9/99
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1999, Micron Technology, Inc.
12
1Mb: 64K x 18, 32K x 32/36
3.3V I/O, PIPELINED, DCD SYNCBURST SRAM
Q
50
V = 1.5V
Z = 50
Figure 1
Q
351
317
5pF
+3.3V
Figure 2
LOAD DERATING CURVES
Micron 64K x 18, 32K x 32, or 32K x 36 SyncBurst
SRAM timing is dependent upon the capacitive loading
on the outputs.
Consult the factory for copies of I/O current versus
voltage curves.
AC TEST CONDITIONS
Input pulse levels ................. V
IH
= (V
DD
/2.2) + 1.5V
....................V
IL
= (V
DD
/2.2) - 1.5V
Input rise and fall times..................................... 1ns
Input timing reference levels..................... V
DD
/2.2
Output reference levels ............................V
DD
Q/2.2
Output load ............................. See Figures 1 and 2
OUTPUT LOAD EQUIVALENT
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MT58L32L32F 32K x 32, 3.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V輸入/輸出,流通式同步脈沖靜態(tài)RAM)
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MT58L64L18P 64K x 18, 3.3V I/O, Pipelined, SCD SyncBurst SRAM(1Mb,3.3V輸入/輸出,流水線式,單循環(huán)取消選擇,同步脈沖靜態(tài)存儲器)
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