參數(shù)資料
型號(hào): MT58L32L32P
廠(chǎng)商: Micron Technology, Inc.
英文描述: 32K x 32, 3.3V I/O, Pipelined, SCD SyncBurst SRAM(1Mb,3.3V輸入/輸出,流水線(xiàn)式,單循環(huán)取消選擇,同步脈沖靜態(tài)存儲(chǔ)器)
中文描述: 32K的× 32,3.3V的I / O的流水線(xiàn),SCD的SyncBurst的SRAM(1兆,3.3V的輸入/輸出,流水線(xiàn)式,單循環(huán)取消選擇,同步脈沖靜態(tài)存儲(chǔ)器)
文件頁(yè)數(shù): 14/17頁(yè)
文件大?。?/td> 329K
代理商: MT58L32L32P
1Mb: 64K x 18, 32K x 32/36 3.3V I/O, Pipelined, SCD SyncBurst SRAM
MT58L64L18P.p65 – Rev. 9/99
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1999, Micron Technology, Inc.
14
1Mb: 64K x 18, 32K x 32/36
3.3V I/O, PIPELINED, SCD SYNCBURST SRAM
READ TIMING
tKC
tKL
CLK
ADSP#
tADSH
tADSS
ADDRESS
tKH
OE#
ADSC#
CE#
(NOTE 2)
tAH
tAS
A1
tCEH
tCES
GW#, BWE#,
BWa#-BWd#
Q
High-Z
tKQLZ
tKQX
tKQ
ADV#
tOEHZ
tKQ
Single READ
BURST READ
tOEQ
tOELZ
tKQHZ
ADV#
suspends
burst.
Burst wraps around
to its initial state.
tAAH
tAAS
tWH
tWS
tADSH
tADSS
Q(A2)
Q(A2 + 1)
Q(A2 + 2)
Q(A1)
Q(A2)
Q(A2 + 1)
Q(A2 + 3)
A2
A3
(NOTE 1)
Deselect
cycle.
(NOTE 3)
(NOTE 4)
Burst continued with
new base address.
DON’T CARE
UNDEFINED
NOTE:
1. Q(A2) refers to output from address A2. Q(A2 + 1) refers to output from the next internal burst address following A2.
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When
CE# is HIGH, CE2# is HIGH and CE2 is LOW.
3. Timing is shown assuming that the device was not enabled before entering into this sequence. OE# does not cause Q
to be driven until after the following clock rising edge.
4. Outputs are disabled within one clock cycle after deselect.
-6
-7.5
-10
SYM
t
AS
t
ADSS
t
AAS
t
WS
t
CES
t
AH
t
ADSH
t
AAH
t
WH
t
CEH
MIN
1.7
1.7
1.7
1.7
1.7
0.5
0.5
0.5
0.5
0.5
MAX
MIN
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
MAX
MIN
2.2
2.2
2.2
2.2
2.2
0.5
0.5
0.5
0.5
0.5
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
READ TIMING PARAMETERS
-6
-7.5
-10
SYM
t
KC
f
KF
t
KH
t
KL
t
KQ
t
KQX
t
KQLZ
t
KQHZ
t
OEQ
t
OELZ
t
OEHZ
MIN
6.0
MAX
MIN
7.5
MAX
MIN
10
MAX
UNITS
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
166
133
100
1.7
1.7
1.9
1.9
3.2
3.2
3.5
4.2
5.0
1.5
1.5
1.5
1.5
1.5
1.5
3.5
3.5
4.2
4.2
5.0
5.0
0
0
0
3.5
4.2
4.5
相關(guān)PDF資料
PDF描述
MT58L32L36P 32K x 36, 3.3V I/O, Pipelined, SCD SyncBurst SRAM(1Mb,3.3V輸入/輸出,流水線(xiàn)式,單循環(huán)取消選擇,同步脈沖靜態(tài)存儲(chǔ)器)
MT6V16M16 512K x 16 x 32 banks RDRAM(512K x 16 x 32組 同步動(dòng)態(tài)RAM)
MT6V16M18 512K x 18 x 32 banks RDRAM(512K x 18 x 32組 同步動(dòng)態(tài)RAM)
MT9LD272AG 2Meg x 72 Nonbuffered DRAM DIMMs(2M x 72無(wú)緩沖動(dòng)態(tài)RAM雙列直插存儲(chǔ)器模塊)
MT9LD272 2Meg x 72 Buffered DRAM DIMMs(2M x 72緩沖動(dòng)態(tài)RAM模塊(雙列直插存儲(chǔ)器模塊))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT58L32L32PT-10 制造商:Cypress Semiconductor 功能描述:32KX32 SRAM PLASTIC TQFP 3.3V 制造商:Rochester Electronics LLC 功能描述:- Bulk
MT58L32L32PT-10 TR 制造商:Cypress Semiconductor 功能描述:32KX32 SRAM PLASTIC TQFP 3.3V
MT58L32L32PT-6 制造商:Cypress Semiconductor 功能描述:32KX32 SRAM PLASTIC TQFP 3.3V 制造商:Rochester Electronics LLC 功能描述:- Bulk
MT58L32L32PT-6TR 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel
MT58L32L36F-10 制造商:Micron Technology Inc 功能描述: