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參數(shù)資料
| 型號(hào)： | MT55L128V32F1T-10 |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 32 ZBT SRAM, 7.5 ns, PQFP100 |
| 封裝： | PLASTIC, MS-026, TQFP-100 |
| 文件頁數(shù)： | 1/26頁 |
| 文件大?。?/td> | 372K |
| 代理商： | MT55L128V32F1T-10 |
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4Mb: 256K x 18, 128K x 32/36 Flow-Through ZBT SRAM
2003, Micron Technology, Inc.
MT55L256L18F1_F.p65 – Rev. F, Pub. 1/03 EN
4Mb: 256K x 18, 128K x 32/36
FLOW-THROUGH ZBT SRAM
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.
4Mb
ZBT SRAM
FEATURES
High frequency and 100 percent bus utilization
Fast cycle times: 10ns, 11ns, and 12ns
Single +3.3V ±5% power supply (VDD)
Separate +3.3V or +2.5V isolated output buffer
supply (VDDQ)
Advanced control logic for minimum control signal
interface
Individual BYTE WRITE controls may be tied LOW
Single R/W# (read/write) control pin
CKE# pin to enable clock and suspend operations
Three chip enables for simple depth expansion
Clock-controlled and registered addresses, data
I/Os and control signals
Internally self-timed, fully coherent WRITE
Internally self-timed, registered outputs to
eliminate the need to control OE#
SNOOZE MODE for reduced-power standby
Common data inputs and data outputs
Linear or interleaved burst modes
Burst feature (optional)
Pin/function compatibility with 2Mb, 8Mb, and
16Mb ZBT SRAM family
165-pin FBGA package
100-pin TSOP package
Automatic power-down
OPTIONS
MARKING
Timing (Access/Cycle/MHz)
7.5ns/10ns/100 MHz
-10
8.5ns/11ns/90 MHz
-11
9ns/12ns/83 MHz
-12
Configurations
3.3V I/O
256K x 18
MT55L256L18F1
128K x 32
MT55L128L32F1
128K x 36
MT55L128L36F1
2.5V I/O
256K x 18
MT55L256V18F1
128K x 32
MT55L128V32F1
128K x 36
MT55L128V36F1
Package
100-pin TQFP
T
165-pin FBGA
F*
Operating Temperature Range
Commercial (0°C to +70°C)
None
Industrial (-40°C to +85°C)**
IT
Part Number Example:
MT55L256L18F1T-12
MT55L256L18F1, MT55L128L32F1,
MT55L128L36F1; MT55L256V18F1,
MT55L128V32F1, MT55L128V36F1
3.3V VDD, 3.3V or 2.5V I/O
GENERAL DESCRIPTION
The Micron Zero Bus Turnaround (ZBT) SRAM
family employs high-speed, low-power CMOS designs
using an advanced CMOS process.
Micron’s 4Mb ZBT SRAMs integrate a 256K x 18,
128K x 32, or 128K x 36 SRAM core with advanced syn-
chronous peripheral circuitry and a 2-bit burst counter.
These SRAMs are optimized for 100 percent bus utiliza-
tion, eliminating any turnaround cycles when
transitioning from READ to WRITE, or vice versa. All
synchronous inputs pass through registers controlled
by a positive-edge-triggered single clock input (CLK).
NOTE: 1. JEDEC-standard MS-026 BHA (LQFP).
2. The 165-ball FBGA is not recommended for new
designs in the 4Mb density.
100-Pin TQFP1
FBGA is not recommended for new designs in the 4Mb density.
** Industrial temperature range offered in specific speed grades and
configurations. Contact factory for more information.
165-Pin FBGA2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT55L128V32F1T-11 | 128K X 32 ZBT SRAM, 8.5 ns, PQFP100 |
| MT56C3818LG-35 | 8K X 18 CACHE SRAM, 35 ns, PQFP52 |
| MT58L128V18PF-6 | 128K X 18 STANDARD SRAM, 3.5 ns, PBGA165 |
| MT58L64V36PF-10 | 64K X 36 STANDARD SRAM, 5 ns, PBGA165 |
| MT58L256L36FS-8.8 | 256K X 36 STANDARD SRAM, 7.5 ns, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT55L128V36P1T-10 | 制造商:Cypress Semiconductor 功能描述:128KX36 SRAM PLASTIC TQFP 3.3V 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT55L128V36P1T10A | 制造商:Micron Technology Inc 功能描述: |
| MT55L128V36P1T-6 | 制造商:Cypress Semiconductor 功能描述:128KX36 SRAM PLASTIC TQFP 3.3V |
| MT55L128V36P1T-7.5 | 制造商:Micron Technology Inc 功能描述: |
| MT55L1MY18PT-10 | 制造商:Cypress Semiconductor 功能描述:1MX18 SRAM PLASTIC TQFP 3.3V P |
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