參數(shù)資料
型號： MT48LC4M32TG-10
元件分類： DRAM
英文描述： 4M X 32 SYNCHRONOUS DRAM, 7 ns, PDSO54
封裝： 0.400 INCH, PLASTIC, TSOP2-54
文件頁數(shù)： 59/69頁
文件大?。?/td> 6213K
代理商： MT48LC4M32TG-10
128Mb: x16, x32
MOBILE SDRAM
09005aef8071a76b
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mbx16x32Mobile_2.fm - Rev. G (DRAFT) 7/04 EN
62
2001 Micron Technology, Inc. All rights reserved.
Figure 49: Single Write – Without Auto Precharge
NOTE:
1. For this example, the burst length = 1, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 15ns is required between <DIN m> and the PRECHARGE command, regardless of frequency.
3. x16:A9 and A11 = “Don’t Care”
x32:A8, A9,and A11 = “Don’t Care”
4. PRECHARGE command not allowed else tRAS would be violated.
DISABLE AUTO PRECHARGE
ALL BANKS
tCH
tCL
tRP
tRAS
tRCD
tRC
DQMU, DQML
CKE
CLK
A0-A9, A11
DQ
BA0, BA1
A10
tCMH
tCMS
tAH
tAS
ROW
BANK
ROW
BANK
t WR
DIN m
tDH
tDS
COMMAND
tCMH
tCMS
NOP 4
PRECHARGE
ACTIVE
NOP
WRITE
ACTIVE
NOP
tAH
tAS
tAH
tAS
SINGLE BANK
tCKH
tCKS
COLUMN m 3
2
T0
T1
T2
T4
T3
T5
T6
T7
T8
DON’T CARE
tCK
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