參數(shù)資料
型號(hào): MSP430L092CY
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, UUC14
封裝: DIE
文件頁(yè)數(shù): 41/44頁(yè)
文件大?。?/td> 682K
代理商: MSP430L092CY
General-Purpose Register
Program Counter
Stack Pointer
Status Register
Constant Generator
General-Purpose Register
PC/R0
SP/R1
SR/CG1/R2
CG2/R3
R4
R5
R12
R13
General-Purpose Register
R6
R7
General-Purpose Register
R8
R9
General-Purpose Register
R10
R11
General-Purpose Register
R14
R15
MSP430L092
MSP430C09x
SLAS673 – SEPTEMBER 2010
www.ti.com
SHORT-FORM DESCRIPTION
CPU
The MSP430 CPU has a 16-bit RISC architecture
that is highly transparent to the application. All
operations, other than program-flow instructions, are
performed as register operations in conjunction with
seven addressing modes for source operand and four
addressing modes for destination operand.
The CPU is integrated with 16 registers that provide
reduced
instruction
execution
time.
The
register-to-register operation execution time is one
cycle of the CPU clock.
Four of the registers, R0 to R3, are dedicated as
program counter, stack pointer, status register, and
constant
generator
respectively.
The
remaining
registers are general-purpose registers.
Peripherals are connected to the CPU using data,
address, and control buses, and can be handled with
all instructions.
Instruction Set
The instruction set consists of the original 51
instructions with three formats and seven address
modes. Each instruction can operate on word and
byte data. Table 2 shows examples of the three types
of instruction formats, Table 3 shows the address
modes.
Table 2. Instruction Word Formats
Dual operands, source-destination
e.g., ADD
R4,R5
R4 + R5
→ R5
Single operands, destination only
e.g., CALL
R8
PC
→(TOS), R8 →PC
Relative jump, un/conditional
e.g., JNE
Jump-on-equal bit = 0
Table 3. Address Mode Descriptions
ADDRESS MODE
S(1)
D(1)
SYNTAX
EXAMPLE
OPERATION
Register
MOV Rs, Rd
MOV R10, R11
R10
→ R11
Indexed
MOV X(Rn), Y(Rm)
MOV 2(R5), 6(R6)
M(2+R5)
→ M(6+R6)
Symbolic (PC relative)
MOV EDE, TONI
M(EDE)
→ M(TONI)
Absolute
MOV & MEM, & TCDAT
M(MEM)
→ M(TCDAT)
Indirect
MOV @Rn, Y(Rm)
MOV @R10, Tab(R6)
M(R10)
→ M(Tab+R6)
M(R10)
→ R11
Indirect autoincrement
MOV @Rn+, Rm
MOV @R10+, R11
R10 + 2
→ R10
Immediate
MOV #X, TONI
MOV #45, TONI
#45
→ M(TONI)
(1)
S = source D = destination
6
Copyright 2010, Texas Instruments Incorporated
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