參數(shù)資料
型號(hào): MSP430F2013TRSAR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQCC16
封裝: GREEN, PLASTIC, QFN-16
文件頁(yè)數(shù): 6/92頁(yè)
文件大?。?/td> 1672K
代理商: MSP430F2013TRSAR
MSP430F20x3
MSP430F20x2
MSP430F20x1
SLAS491H
– AUGUST 2005 – REVISED AUGUST 2011
Special Function Registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
not allocated to a functional purpose are not physically present in the device. Simple software access is provided
with this arrangement.
Legend
rw:
Bit can be read and written.
rw-0,1:
Bit can be read and written. It is reset or set by PUC.
rw-(0,1):
Bit can be read and written. It is reset or set by POR.
SFR bit is not present in device.
Table 8. Interrupt Enable Register 1 and 2
Address
7
6
5
4
3
2
1
0
00h
ACCVIE
NMIIE
OFIE
WDTIE
rw-0
WDTIE
Watchdog Timer interrupt enable. Inactive if watchdog mode is selected. Active if Watchdog Timer is configured in
interval timer mode.
OFIE
Oscillator fault interrupt enable
NMIIE
(Non)maskable interrupt enable
ACCVIE
Flash access violation interrupt enable
Address
7
6
5
4
3
2
1
0
01h
Table 9. Interrupt Flag Register 1 and 2
Address
7
6
5
4
3
2
1
0
02h
NMIIFG
RSTIFG
PORIFG
OFIFG
WDTIFG
rw-0
rw-(0)
rw-(1)
rw-1
rw-(0)
WDTIFG
Set on watchdog timer overflow (in watchdog mode) or security key violation.
Reset on VCC power-on or a reset condition at the RST/NMI pin in reset mode.
OFIFG
Flag set on oscillator fault.
PORIFG
Power-On Reset interrupt flag. Set on VCC power-up.
RSTIFG
External reset interrupt flag. Set on a reset condition at RST/NMI pin in reset mode. Reset on VCC power-up.
NMIIFG
Set via RST/NMI pin
Address
7
6
5
4
3
2
1
0
03h
14
Copyright
2005–2011, Texas Instruments Incorporated
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MSP430F2001IRSA 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQCC16
MSP430F2013IPWR 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PDSO14
MSP430F2002IRSA 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQCC16
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