參數(shù)資料
型號: MSM82C51A-2GS
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER TRANSMITTER
中文描述: 通用同步異步收發(fā)器
文件頁數(shù): 14/26頁
文件大小: 203K
代理商: MSM82C51A-2GS
14/26
Semiconductor
MSM82C51A-2RS/GS/JS
Serial Interface Part
Notes: 1. AC characteristics are measured at 150 pF capacity load as an output load based on 0.8 V at
low level and 2.2 V at high level for output and 1.5 V for input.
2. Addresses are
CS
and C/
D
.
3. f
TX
or f
RX
1/(30 Tcy)
1
Baud
f
TX
or f
RX
1/(5 Tcy)
16
, 64
Baud
4. This recovery time is mode Initialization only. Recovery time between command writes for
Asynchronous Mode is 8 t
CY
and for Synchronous Mode is 18 t
CY
.
Write Data is allowed only when TXRDY = 1.
5. This recovery time is Status read only.
Read Data is allowed only when RXRDY = 1.
6. Status update can have a maximum delay of 28 clock periods from event affecting the status.
Max.
t
CY
–50
20
1
64
615
615
64
615
615
Main Clock Period
Clock Low Tme
Clock High Time
Clock Rise/Fall Time
TXD Delay from Falling Edge of
TXC
t
CY
t
f
t
f
t
r,
t
f
t
DTX
f
TX
f
TX
f
TX
t
TPW
t
TPW
t
TPD
t
TPD
f
RX
f
RX
f
RX
t
RPW
t
RPW
t
RPD
t
RPD
ns
ns
ns
ns
m
S
kHz
kHz
kHz
t
CY
t
CY
t
CY
t
CY
kHz
kHz
kHz
t
CY
t
CY
t
CY
t
CY
Parameter
Unit
Symbol
Min.
160
50
70
DC
DC
DC
13
2
15
3
DC
DC
DC
13
2
15
3
Note 3
Remarks
Transmitter Clock Frequency
Note 3
1
Baud
16
Baud
64
Baud
1
Baud
16
, 64
Baud
1
Baud
16
, 64
Baud
1
Baud
16
Baud
64
Baud
1
Baud
16
, 64
Baud
1
Baud
16
, 64
Baud
Transmitter Clock Low Time
Transmitter Clock High Time
Receiver Clock Frequency
Note 3
Receiver Clock Low Time
Receiver Clock High Time
Time from the Center of Last Bit to the Rise of
TXRDY
Time from the Leading Edge of
WR
to the Fall
of TXRDY
Time From the Center of Last Bit to the Rise of RXRDY
Time from the Leading Edge of
RD
to the Fall
of RXRDY
Internal SYNDET Delay Time from Rising Edge of
RXC
SYNDET Setup Time for
RXC
TXE Delay Time from the Center of Last Bit
t
TXRDY
8
t
CY
t
TXRDY CLEAR
400
ns
t
RXRDY
26
t
CY
t
RXRDY CLEAR
400
ns
t
IS
t
ES
26
t
CY
t
CY
t
CY
18
20
MODEM Control Signal Delay Time from Rising Edge
of
WR
MODEM Control Signal Setup Time for Falling Edge
of
RD
RXD Setup Time for Rising Edge of
RXC
(1X Baud)
RXD Hold Time for Falling Edge of
RXC
(1X Baud)
t
WC
t
CY
8
t
CR
t
CY
20
t
RXDS
t
RXDH
t
CY
t
CY
11
17
t
TXEMPTY
(V
CC
= 4.5 to 5.5 V, Ta = –40 to 85°C)
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