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參數(shù)資料
| 型號(hào)： | MSM7583GS-BK |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | pie/4 Shift QPSK MODEM |
| 中文描述： | 餡餅/ 4移調(diào)制調(diào)制解調(diào)器 |
| 文件頁(yè)數(shù)： | 17/23頁(yè) |
| 文件大小： | 215K |
| 代理商： | MSM7583GS-BK |
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MSM7583
Semiconductor
17/23
FUNCTIONAL DESCRIPTION
Control Registers
(1) CR0 (basic operation mode setting)
CR0
Initial value (*)
B7
0
ENVPD
TXCSEL
0
MODOFF
0
IFSEL1
0
IFSEL2
0
ENVSEL
0
TEST1
0
TEST0
0
B6
B5
B4
B3
B2
B1
B0
* The initial value is set when a reset signal is supplied at RESET.
B7: Transmit envelope output power down control
0/Envelope output ON
1/Envelope output OFF
B6: Transmit timing clock selection
0/TXCI input: 384 kHz.
TXCO output: 384 kHz output from APLL
Transmit data TXD is input in synchronization with the rising edge of
TXCI (APLL is on.)
1/TXCI input: 3.84 MHz.
TXCO output: 384 kHz (one-tenth of the TXCI frequency)
Transmit data TXD is input in synchronization with the rising edge of
TXCO (APLL is off.)
B5: Modulation on/off control
1/modulation OFF (with phase fixed)
0/modulation ON.
B4, B3: Receiver input IF frequency selection
(0, 0), (0, 1): 1.2 MHz
(1, 0)
: 10.8 MHz
(1, 1)
: 10.7 MHz/10.75 MHz
B2: Transmit envelope (I
2
+ Q
2
or
I + Q
2
) output selection
When B1, B0 is (0, 0)
: 0/
I + Q
1/I
2
+ Q
2
output
2
output
When B1, B0 is other than (0, 0) : 0/Channel 1 receive monitor output
1/Channel 2 receive monitor output
B1, B0: Test mode selection bits. Each monitor output is output to the transmit ENV pin.
(0, 0): transmit envelope (I
2
+ Q
2
or
I + Q
(0, 1): receiver phase detection signal output
(1, 0): receiver delay detection signal output
(1, 1): receiver internal AFC information output
2
) output
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