參數(shù)資料
型號: MSM6679A-110
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: Voice Synthesiser(SI/SD話音識別,記錄/播放,語音合成器)
中文描述: 語音合成器(硅/標清話音識別,記錄/播放,語音合成器)
文件頁數(shù): 11/50頁
文件大小: 362K
代理商: MSM6679A-110
Semiconductor
MSM6679A-110 Voice Recognition Processor
9
Pin #
84-pin/
100-pin
25/17
Pin Name
ROMRD
Signal Type
Description
Output
ROM Read. This is a strobe signal for direct connection to an external
ROM's
READ
input. When asserted LOW, this signal indicates that the
MSM6679A-110 is ready to read data from the ROM.
RAM Write. This is a strobe signal for direct connection to an external
RAM's
WR
input. When asserted LOW, this signal indicates that the
MSM6679A-110 is ready to write data to RAM.
RAM Read. This is a strobe signal for direct connection to an external
RAM's
RD
input. When asserted LOW, this signal indicates that the
MSM6679A-110 is ready to read data from RAM.
Reserved. This pin is reserved for future use and must be tied to GND.
MSM665x Reset. This pin provides a reset signal for an external
speech synthesis engine.
Flash Bank Control (Extended Segments). This is the control signal for
flash memory banking.
MSM665x Next Address Request. This pin signals to the
MSM6679A-110 that the external speech synthesis engine is ready for
another command.
Reserved. These pins are reserved for future use and must be left open.
Reserved. These pins are reserved for future use and should be left open.
Voice Out. This pin is the PWM output for speech synthesis, voice
sample playback, and voice prompts. An external integrator must be
used to convert this to an analog signal.
26/18
WRRAM
Output
27/19
RDRAM
Output
28/20
N/C–
Input
29/21
RESOUT
Output
30/22
ES
Output
31/23
NAR
Input
32/24
-/25,26
N/C
N/C
(do not connect)
(not connected)
33/27
VOICEOUT1
Output
34/28
35/29
36/30
37/31
38/32
39/33
40/34
41/35
-/36
42/37
-/38
43/39
44/40
45/41
46/42
47/43
48/44
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
N/C
VDD
N/C
A8
A9
A10
A11
A12
A13
Bidirectional I/O
Memory Address/Data Bus. These are multiplexed address/data lines
for the eight data bits and the lower eight address bits (the upper eight
address bits are not multiplexed).
(not connected)
Digital Power
(not connected)
Reserved. This pin is reserved for future use and should be left open.
Power.
Reserved. This pin is reserved for future use and should be left open.
Outputs
Memory Address Bus. These are the upper eight address pins.
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