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參數(shù)資料
| 型號： | MSM52V1017L |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 65,536-Word ×16-Bit CMOS STATIC RAM(64k字×16位靜態(tài)RAM) |
| 中文描述： | 65,536字× 16位的CMOS靜態(tài)RAM（64K的字× 16位靜態(tài)RAM）的 |
| 文件頁數(shù)： | 7/9頁 |
| 文件大?。?/td> | 124K |
| 代理商： | MSM52V1017L |
Semiconductor
MSM52V1017L
7/9
Write Cycle
Parameter
Symbol
MSM52V1017L-85
Min.
85
0
65
5
35
0
75
75
75
MSM52V1017L-10MSM52V1017L-12
Min.
Max.
100
—
0
—
75
—
5
—
40
—
0
—
90
—
90
—
90
—
Max.
—
—
—
—
—
—
—
—
—
Unit
Min.
120
0
90
5
50
0
100
100
100
Max.
—
—
—
—
—
—
—
—
—
Write Cycle Time
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Setup Time
Data Hold Time
WE
to Output in High-Z
Output Active from End of Write
LB
,
UB
to End of Write
Address Valid to End of Write
ns
ns
ns
ns
ns
ns
—
5
30
—
—
5
—
5
35
—
35
—
ns
ns
ns
75
—
90
100
—
—
ns
t
WC
t
AS
t
WP
t
WR
t
DS
t
DH
t
LBW
t
UBW
t
CW
t
WHZ
t
WLZ
t
AW
(V
CC
= 2.7 V to 3.6 V, Ta = 0°C to 70°C)
CE to End of Write
ns
ADDRESS
LB
,
UB
CE
WE
D
OUT
D
IN
t
WC
t
LBW
, t
UBW
t
CW
t
AW
t
AS
t
WP
t
WR
t
WLZ
t
WHZ
Data-in
t
DS
t
DH
Notes:
1. A write cycle occurs during the overlap of
LB
= "L" (or
UB
= "L"), CE = "H" and
WE
=
"L".
2.
OE
may be either of "H" or "L" in the write cycle.
3. t
AS
is specified from
LB
= "L" (or
UB
= "L"), CE = "H" or
WE
= "L", whichever occurs last.
4. t
WP
is an overlap time of
LB
= "L" (or
UB
= "L"), CE = "H" and
WE
= "L".
5. t
WR
, t
DS
and t
DH
are specified from
LB
= "H" (or
UB
= "H"), CE = "L" or
WE
= "H",
whichever occurs first.
6. t
WHZ
is specified by the time when DATA output is floating, not defined by the output
level.
7. When I/O pins are in the output mode, don't apply the inverted input signal to the
output pins.
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