參數(shù)資料
型號(hào)： MSC8101VT1500F
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 64-BIT, 75 MHz, OTHER DSP, PBGA332
封裝： 17 X 17 MM, LIDDED FLIP CHIP, PLASTIC, BGA-332
文件頁(yè)數(shù)： 71/104頁(yè)
文件大?。?/td> 1811K
代理商： MSC8101VT1500F
FC-PBGA Package Description
MSC8101 Technical Data, Rev. 18
Freescale Semiconductor
3-3
Figure 3-2.
MSC8101 Flip Chip Plastic Ball Grid Array (FC-PBGA), Bottom Vie
1
3
42
5
6
7
8
10
14
13
12
11
9
B
C
D
E
F
G
H
N
M
L
J
K
P
A
Bottom View
T
U
15
16
V
W
EE1
PA29
PA28
18
19
17
THERM
IRQ1
PA31
PB30
TDO
EE4
PA27
PB27
PC25
PC24
PC22
PB21
PB23
PA21
IRQ5
EE0
PD30
PD29
DP0
IRQ3
TMS
PD31
EED
EE3
PB28
PC26
PA25
PA24
SPARE
PB22
PD19
PA18
PB19
D1
THERM
PC30
PC29
IRQ4
D0
TRST
PC31
EE5
EE2
PC28
PB26
PB25
PB24
PA22
PA20
PC15
PA15
PD18
D4
IRQ2
VDD
PB29
D2
D3
TCK
PB31
VDD
VDDH
VDD
VDDH
VDD
PA23
PB18
PA17
PC12
SRESET
PD16
D7
IRQ6
GND
VDDH
D5
D6
VDDH
GND
VDD
GND
PC23
PB20
PA19
PC13
NMI_
PO
NMI
D17
D14
PA30
GND
D15
D16
D12
GND
D13
PC27
PA16
PD17
GND
VDDH
VCC
GND
VCC
GND
D11
D8
GND
D9
D10
GND
TDI
IRQ7
VDDH
GND
PA26
GND
VDDH
PC14
HRESET
TEST
RST
D22
D19
D20
D21
GND
D18
VDDH
CLKIN
DLL_IN
VDD
CLK
PA11
PA14
PA13
D62
PWE5
PSDA
PWE1
D61
PWE6
TEA
BR
PWE7
PSDA
CS1
CS5
A28
A23
A19
A16
A9
A7
A11
D27
D24
D25
D26
D23
GND
VDD
GND
VDDH
PA12
PD7
PA9
PA10
D32
D29
D30
D31
GND
D28
VDDH
PC6
PC4
VDDH
PC7
PA7
PC5
PA8
D37
D34
D35
D36
D33
GND
VDDH
GND
VDD
PA6
ABB
INT
SPARE
D42
D39
D40
D41
GND
D38
VDD
TT1
GND
VDDH
AACK
BG
ARTRY
D46
D43
TA
GND
D44
D45
PSD
BADDR
GND
VDDH
CS6
A21
TT0
GND
VDD
TS
TBST
D51
D48
GND
PWE2
D49
D50
GND
BADDR
PSD
D47
GND
A26
A1
GND
VDDH
A3
TT3
TT4
TT2
D55
D52
VDDH
GND
D53
D54
VDDH
GND
VDDH
GND
VDDH
GND
VDDH
A2
A0
A4
D60
D57
VDDH
D58
D59
VDDH
VDD
D56
VDD
CS0
VDDH
VDD
A15
A12
A6
A5
A8
D63
GBL
PGTA
PWE0
DBB
DBG
MOD
ALE
MOD
CS3
CS7
A30
A27
A24
A20
A13
A10
A17
R
1
2
10
MOD
CK1
CK2
CK3
31
30
MUX
CS2
1
SYN1
OUT
5
CONF
SYN1
OUT
SYN
RESET
SYN
VAL
BADDR
POE
PWE4
BCTL0
PSD
28
29
27
CAS
PWE3
BCTL1
CS4
A31
A29
A25
A22
A14
A18
WE
1
3
42
5
6
7
8
10
14
13
12
11
9
15
16
18
19
17
B
C
D
E
F
G
H
N
M
L
J
K
P
A
T
U
V
W
R
_OUT
MSC8
101
TSIZ1
TSIZ3
TSIZ0
TSIZ2
Note: Signal names in this figure are the default signals after reset, except for signals C2, C19, D1, D2, D18, E1, F3, H13, H14, and W11 which show the second configuration signal name.
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