參數(shù)資料
型號: MSC1214Y2PAGR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 91/111頁
文件大?。?/td> 1102K
代理商: MSC1214Y2PAGR
MSC1211, MSC1212
MSC1213,MSC1214
SBAS323G JUNE 2004 REVISED OCTOBER 2007
www.ti.com
80
DAC0 Control (DACCON0)
DACSEL = 04h
7
6
5
4
3
2
1
0
Reset Value
SFR B5h
COR0
EOD0
IDAC0DIS
IDAC0SINK
0
SELREF0
DOM0_1
DOM0_0
63h
COR0
Current Over Range on DAC0
bit 7
Write: 0 = Clear to release from high-impedance state back to normal mode unless an over-range condition exists.
1 = NOP
Read: 0 = No current over range for DAC0.
0 = NOP
1 = IDAC overcurrent for three consecutive ticks on ms clock USEC (EOD0 = 1) or Current Over Range raw
signal (EOD0 = 0).
EOD0
Enable Over-Current Detection
bit 6
0 = Disable over-current detection.
1 = Enable over-current detection (default). After three consecutive ticks on MSEC clock of overcurrent, the DAC is
disabled; however, the register values are preserved. Writing to COR0 releases the high-impedance state.
IDAC0DIS
IDAC0 Disable (for DOM0 = 00)
bit 5
0 = IDAC on mode for DAC0.
1 = IDAC off mode for DAC0 (default).
IDAC0SINK ENABLE CURRENT SINK
bit 4
0 = DAC0 is sourcing current.
1 = DAC0 is sinking current using external device.
Not Used
bit 3
SELREF0
Select the Reference Voltage for DAC0 Voltage Reference.
bit 2
0 = DAC0 VREF = AVDD (default).
1 = DAC0 VREF = voltage on REF IN+/REFOUT pin.
DOM0_10 DAC Output Mode DAC0.
bits 10
DOM0
OUTPUT MODE for DAC0
00
Normal VDAC output; IDAC controlled by IDAC0DIS bit.
01
Power-Down mode—VDAC output off 1k
to AGND, IDAC off.
10
Power-Down mode—VDAC output off 100k
to AGND, IDAC off.
11
Power-Down mode—VDAC output off high impedance, IDAC off (default).
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