參數(shù)資料
型號： MSC1212Y5PAGR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64
封裝： GREEN, PLASTIC, TQFP-64
文件頁數(shù)： 105/111頁
文件大小： 1113K
代理商： MSC1212Y5PAGR
MSC1211, MSC1212
MSC1213,MSC1214
SBAS323G JUNE 2004 REVISED OCTOBER 2007
www.ti.com
93
Accumulator (A or ACC)
7
6
5
4
3
2
1
0
Reset Value
SFR E0h
ACC.7
ACC.6
ACC.5
ACC.4
ACC.3
ACC.2
ACC.1
ACC.0
00h
ACC.70
Accumulator. This register serves as the accumulator for arithmetic and logic operations.
bits 70
Summation/Shifter Control (SSCON)
7
6
5
4
3
2
1
0
Reset Value
SFR E1h
SSCON1
SSCON0
SCNT2
SCNT1
SCNT0
SHF2
SHF1
SHF0
00h
The Summation register is powered down when the ADC is powered down. If all zeroes are written to this register, the 32-bit
SUMR30 registers will be cleared. The Summation registers will do sign-extend if Bipolar mode is selected in ADCON1.
SSCON10 Summation/Shift Count.
bits 76
SSCON1
SSCON0
SCNT2
SCNT1
SCNT0
SHF2
SHF1
SHF0
DESCRIPTION
0
Clear Summation Register
0
1
0
CPU Summation on Write to SUMR0 (sum count/shift ignored)
0
1
0
CPU Subtraction on Write to SUMR0 (sum count/shift ignored)
1
0
x
Note (1)
CPU Shift only
0
1
Note (1)
x
ADC Summation only
1
Note (1)
ADC Summation completes, then shift completes
(1) Refer to register bit definition.
SCNT20
Summation Count. When the summation is complete an interrupt will be generated unless masked. Reading the
bits 53
SUMR0 register clears the interrupt.
SCNT2
SCNT1
SCNT0
SUMMATION COUNT
0
2
0
1
4
0
1
0
8
0
1
16
1
0
32
1
0
1
64
1
0
128
1
256
SHF20
Shift Count.
bits 20
SHF2
SHF1
SHF0
SHIFT
DIVIDE
0
1
2
0
1
2
4
0
1
0
3
8
0
1
4
16
1
0
5
32
1
0
1
6
64
1
0
7
128
1
8
256
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MSC1212Y5PAGRG4 功能描述:數(shù)據(jù)轉換系統(tǒng) Precision ADC & DACs w/8051 CPU & Flash RoHS:否 制造商:Texas Instruments 轉換速率:0.001 MSPs 分辨率:24 bit 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel
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