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| 型號(hào)： | MR80C52CXXX-12SCR |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| 文件頁(yè)數(shù)： | 146/198頁(yè) |
| 文件大?。?/td> | 4822K |
| 代理商： | MR80C52CXXX-12SCR |
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51
8111C–MCU Wireless–09/09
AT86RF231
The CSMA_SEED_0 and CSMA_SEED_1 register bits (registers 0x2D, 0x2E) define a random
seed for the back-off-time random-number generator in the AT86RF231.
The MAX_BE and MIN_BE register bits (register 0x2F) sets the maximum and minimum CSMA
back-off exponent (according to [1]).
7.2.3
RX_AACK_ON - Receive with Automatic ACK
The general functionality of the RX_AACK procedure is shown in Figure 7-9 on page 53.
The gray shaded area is the standard flow of an RX_AACK transaction for IEEE 802.15.4 com-
pliant frames, refer Section 7.2.3.2 “Configuration of IEEE Scenarios” on page 55. All other
procedures are exceptions for specific operating modes or frame formats, refer to Section
The frame filtering operations is described in detail in Section 7.2.3.5 “Frame Filtering” on page
61.
In RX_AACK_ON state, the radio transceiver listens for incoming frames. After detecting a valid
PHR, the radio transceiver parses the frame content of the MAC header (MHR), refer to Section
Generally, at nodes, configured as a normal device or PAN coordinator, a frame is not indicated
if the frame filter does not match and the FCS is invalid. Otherwise, the interrupt IRQ_3
(TRX_END) is issued after the completion of the frame reception. The microcontroller can then
read the frame. An exception applies if promiscuous mode is enabled; see Section 7.2.3.2 “Con-
figuration of IEEE Scenarios” on page 55, in that case an IRQ_3 (TRX_END) interrupt is issued,
even if the FCS fails.
If the content of the MAC addressing fields of the received frame (refer to IEEE 802.15.4 section
7.2.1) matches one of the configured addresses, dependent on the addressing mode, an
address match interrupt IRQ_5 (AMI) is issued, refer to Section 7.2.3.5 “Frame Filtering” on
page 61. The expected address values are to be stored in registers 0x20 - 0x2B (Short address,
PAN-ID and IEEE address). Frame filtering as described in Section 7.2.3.5 “Frame Filtering” on
page 61 is also valid for Basic Operating Mode.
During reception the AT86RF231 parses bit [5] (ACK Request) of the frame control field of the
received data or MAC command frame to check if an ACK reply is expected. In that case and if
the frame passes the third level of filtering, see IEEE 802.15.4-2006, section 7.5.6.2, the radio
transceiver automatically generates and transmits an ACK frame.
The content of the frame pending subfield of the ACK response is set by register bit
AACK_SET_PD (register 0x2E, CSMA_SEED_1) when the ACK frame is sent in response to a
data request MAC command frame, otherwise this subfield is set to 0. The sequence number is
copied from the received frame.
Optionally, the start of the transmission of the acknowledgement frame can be influenced by
register bit AACK_ACK_TIME. Default value (according to standard IEEE 802.15.4) is 12 sym-
bol times after the reception of the last symbol of a data or MAC command frame.
If the register bit AACK_DIS_ACK (register 0x2E, CSMA_SEED_1) is set, no acknowledgement
frame is sent even if an acknowledgment frame was requested. This is useful for operating the
MAC hardware accelerator in promiscuous mode, see Section 7.2.3.2 “Configuration of IEEE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MQ80C52XXX-25 | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44 |
| MD80C52EXXX-20SB | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CDIP40 |
| MD80C52EXXX-16SBD | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40 |
| MD80C52EXXX-20SB | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CDIP40 |
| MQ80C32E-36SC | 8-BIT, 36 MHz, MICROCONTROLLER, CQFP44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MR80C86 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86/B | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:Microprocessor, 16 Bit, 44 Pin, Ceramic, LCC |
| MR80C86-2 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86-2/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MR80C86-2/B | 制造商:Intersil Corporation 功能描述:MPU 80C86 16BIT CMOS 8MHZ 44PLCC - Rail/Tube |
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