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| 型號(hào)： | MR80C32E-30 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 30 MHz, MICROCONTROLLER, CQCC44 |
| 文件頁(yè)數(shù)： | 90/324頁(yè) |
| 文件大小： | 3748K |
| 代理商： | MR80C32E-30 |
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18
2513L–AVR–03/2013
ATmega162/V
SRAM Data
Memory
Figure 9 shows how the ATmega162 SRAM Memory is organized. Memory configuration B
refers to the ATmega161 compatibility mode, configuration A to the non-compatible mode.
The ATmega162 is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in the Opcode for the IN and OUT instructions. For the Extended
I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can
be used. The Extended I/O space does not exist when the ATmega162 is in the ATmega161
compatibility mode.
In Normal mode, the first 1280 Data Memory locations address both the Register File, the I/O
Memory, Extended I/O Memory, and the internal data SRAM. The first 32 locations address the
Register File, the next 64 location the standard I/O memory, then 160 locations of Extended I/O
memory, and the next 1024 locations address the internal data SRAM.
In ATmega161 compatibility mode, the lower 1120 Data Memory locations address the Register
File, the I/O Memory, and the internal data SRAM. The first 96 locations address the Register
File and I/O Memory, and the next 1024 locations address the internal data SRAM.
An optional external data SRAM can be used with the ATmega162. This SRAM will occupy an
area in the remaining address locations in the 64K address space. This area starts at the
address following the internal SRAM. The Register File, I/O, Extended I/O and Internal SRAM
uses the occupies the lowest 1280 bytes in Normal mode, and the lowest 1120 bytes in the
ATmega161 compatibility mode (Extended I/O not present), so when using 64KB (65,536 bytes)
of External Memory, 64,256 Bytes of External Memory are available in Normal mode, and
64,416 Bytes in ATmega161 compatibility mode. See “External Memory Interface” on page 26
for details on how to take advantage of the external memory map.
When the addresses accessing the SRAM memory space exceeds the internal data memory
locations, the external data SRAM is accessed using the same instructions as for the internal
data memory access. When the internal data memories are accessed, the read and write strobe
pins (PD7 and PD6) are inactive during the whole access cycle. External SRAM operation is
enabled by setting the SRE bit in the MCUCR Register.
Accessing external SRAM takes one additional clock cycle per byte compared to access of the
internal SRAM. This means that the commands LD, ST, LDS, STS, LDD, STD, PUSH, and POP
take one additional clock cycle. If the Stack is placed in external SRAM, interrupts, subroutine
calls and returns take three clock cycles extra because the 2-byte Program Counter is pushed
and popped, and external memory access does not take advantage of the internal pipeline
memory access. When external SRAM interface is used with wait-state, one-byte external
access takes two, three, or four additional clock cycles for one, two, and three wait-states
respectively. Interrupt, subroutine calls and returns will need five, seven, or nine clock cycles
more than specified in the instruction set manual for one, two, and three wait-states.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 (+160) I/O Registers, and the 1024 bytes of inter-
nal data SRAM in the ATmega162 are all accessible through all these addressing modes. The
Register File is described in “General Purpose Register File” on page 12.
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相關(guān)代理商/技術(shù)參數(shù) |
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| MR80C86-2/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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