105
2513L–AVR–03/2013
ATmega162/V
Each half period of the external clock applied must be longer than one system clock cycle to
ensure correct sampling. The external clock must be guaranteed to have less than half the sys-
tem clock frequency (f
ExtClk < fclk_I/O/2) given a 50/50% duty cycle. Since the edge detector uses
sampling, the maximum frequency of an external clock it can detect is half the sampling fre-
quency (Nyquist sampling theorem). However, due to variation of the system clock frequency
and duty cycle caused by Oscillator source (crystal, resonator, and capacitors) tolerances, it is
recommended that maximum frequency of an external clock source is less than f
clk_I/O/2.5.
An external clock source can not be prescaled.
Figure 45. Prescaler for Timer/Counter0, Timer/Counter1, and Timer/Counter
3 Note:
1. The synchronization logic on the input pins (
Special Function IO
Register – SFIOR
Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to the PSR2 and PSR310 bits is kept, hence keeping the corresponding
prescaler reset signals asserted. This ensures that the corresponding Timer/Counters are halted
and can be configured to the same value without the risk of one of them advancing during con-
figuration. When the TSM bit is written to zero, the PSR2 and PSR310 bits are cleared by
hardware, and the Timer/Counters start counting simultaneously.
Bit 0 – PSR310: Prescaler Reset Timer/Counter3, Timer/Counter1, and Timer/Counter0
When this bit is one, the Timer/Counter3, Timer/Counter1, and Timer/Counter0 prescaler will be
reset. This bit is normally cleared immediately by hardware, except if the TSM bit is set. Note
that Timer/Counter3, Timer/Counter1, and Timer/Counter0 share the same prescaler and a
reset of this prescaler will affect all three timers.
PSR321
Clear
clk
T1
TIMER/COUNTER1 CLOCK SOURCE
0
CS10
CS11
CS12
T1
clk
T0
TIMER/COUNTER1 CLOCK SOURCE
0
CS00
CS01
CS02
T0
clk
T3
TIMER/COUNTER3 CLOCK SOURCE
0
CS30
CS31
CS32
10-BIT T/C PRESCALER
CK
CK/8
CK/64
CK/256
CK/1024
CK/16
CK/32
Bit
7
6
5
4
3
2
1
0
TSM
XMBK
XMM2
XMM1
XMM0
PUD
PSR2
PSR310
SFIOR
Read/Write
R/W
Initial Value
0