275
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
After data is loaded to the page buffer, program the EEPROM page, see
Figure 27-12.
Figure 27-12. Serial Programming instruction example.
27.8.4
SPI Serial Programming Characteristics
27.9
Programming via the JTAG Interface
Programming through the JTAG interface requires control of the four JTAG specific pins: TCK, TMS, TDI, and
TDO. Control of the reset and clock pins is not required.
To be able to use the JTAG interface, the JTAGEN Fuse must be programmed. The device is default shipped with
the fuse programmed. In addition, the JTD bit in MCUCSR must be cleared. Alternatively, if the JTD bit is set, the
external reset can be forced low. Then, the JTD bit will be cleared after two chip clocks, and the JTAG pins are
available for programming. This provides a means of using the JTAG pins as normal port pins in Running mode
while still allowing In-System Programming via the JTAG interface. Note that this technique can not be used when
using the JTAG pins for Boundary-scan or On-chip Debug. In these cases the JTAG pins must be dedicated for
this purpose.
During programming the clock frequency of the TCK Input must be less than the maximum frequency of the chip.
The System Clock Prescaler can not be used to divide the TCK Clock Input into a sufficiently low frequency.
As a definition in this datasheet, the LSB is shifted in and out first of all Shift Registers.
Byte 1
Byte 2
Byte 3
Byte 4
Adr MSB
Adr LSB
Bit 15 B
0
Serial Programming Instruction
Program Memory/
EEPROM Memory
Page 0
Page 1
Page 2
Page N-1
Page Buffer
Write Program Memory Page/
Write EEPROM Memory Page
Load Program Memory Page (High/Low Byte)/
Load EEPROM Memory Page (page access)
Byte 1
Byte 2
Byte 3
Byte 4
Bit 15 B
0
Adr MSB
Adr LSB
Page Offset
Page Number
Adr M
MS
SB
A
Adrr L
LSB
B