![](http://datasheet.mmic.net.cn/30000/MQ83C154DXXX-25-883R_datasheet_2377229/MQ83C154DXXX-25-883R_225.png)
225
6384E–ATARM–05-Feb-10
AT91SAM9G20
ECC error: The ECCERR flag in the ECC Status Registers (ECC_SR1/ECC_SR2) are set.
An error has been detected in the ECC code stored in the Flash memory. The position of the
corrupted bit can be found by the application performing an XOR between the Parity and the
NParity contained in the ECC code stored in the Flash memory.
Non correctable error: The MULERR flag in the ECC Status Registers
(ECC_SR1/ECC_SR2) are set. Several unrecoverable errors have been detected in the
Flash memory page.
ECC Status Registers, ECC Parity Registers are cleared when a read/write command is
detected or a software reset is performed.
For Single-bit Error Correction and Double-bit Error Detection (SEC-DED) hsiao code is used.
24-bit ECC is generated in order to perform one bit correction per 256 or 512 bytes for pages of
512/2048/4096 8-bit words. 32-bit ECC is generated in order to perform one bit correction per
512/1024/2048/4096 8- or 16-bit words.They are generated according to the schemes shown in
Figure 23-2. Parity Generation for 512/1024/2048/4096 8-bit Words
To calculate P8’ to PX’ and P8 to PX, apply the algorithm that follows.
Page size = 2
n
for i =0 to n
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
P8
P8'
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
P8
P8'
P16
P16'
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
P8
P8'
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
P8
P8'
P16
P16'
P32
1st byte
P32
2nd byte
3rd byte
4 th byte
Page size th byte
(page size -1 )th byte
PX
PX'
Page size = 512 Px = 2048
Page size = 1024 Px = 4096
Page size = 2048 Px = 8192
Page size = 4096 Px = 16384
(page size -2 )th byte
(page size -3 )th byte
P1
P1'
P1
P1'
P1
P2
P2'
P2
P2'
P4
P4'
P1=bit7(+)bit5(+)bit3(+)bit1(+)P1
P2=bit7(+)bit6(+)bit3(+)bit2(+)P2
P4=bit7(+)bit6(+)bit5(+)bit4(+)P4
P1'=bit6(+)bit4(+)bit2(+)bit0(+)P1'
P2'=bit5(+)bit4(+)bit1(+)bit0(+)P2'
P4'=bit7(+)bit6(+)bit5(+)bit4(+)P4'