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型號(hào)：	MQ80C52XXX-30/883D
廠(chǎng)商：	ATMEL CORP
元件分類(lèi)：	微控制器/微處理器
英文描述：	8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44
封裝：	CERAMIC, QFP-44
文件頁(yè)數(shù)：	252/1262頁(yè)
文件大?。?/td>	3503K
代理商：	MQ80C52XXX-30/883D

11028E–ATARM–22-Apr-13

1. Timings SSC4 and SSC7 depend on the start condition. When STTDLY = 0 (Receive start delay) and START = 4, or 5 or 7

(Receive Start Selection), two Periods of the MCK must be added to timings.

2. For output signals (TF, TD, RF), Min and Max access times are defined. The Min access time is the time between the TK (or

RK) edge and the signal change. The Max access time is the time between the TK edge and the signal stabilization. Figure

49-18 illustrates Min and Max accesses for SSC0. The same applies to SSC1, SSC4, and SSC7, SSC10 and SSC13.

1. Timings SSC4 and SSC7 depend on the start condition. When STTDLY = 0 (Receive start delay) and START = 4, or 5 or 7

(Receive Start Selection), two Periods of the MCK must be added to timings.

2. For output signals (TF, TD, RF), Min and Max access times are defined. The Min access time is the time between the TK (or

RK) edge and the signal change. The Max access time is the time between the TK edge and the signal stabilization. Figure

49-18 illustrates Min and Max accesses for SSC0. The same applies to SSC1, SSC4, and SSC7, SSC10 and SSC13.

RF/RD setup time before RK edge (RK output)

RF/RD hold time after RK edge (RK output)

RK edge to RF (RK output)

Table 49-36. SSC Timings with 3.3V Peripheral Supply (Continued)

Parameter

Table 49-37. SSC Timings with 1.8V Peripheral Supply

Parameter

TK edge to TF/TD (TK output, TF output)

TK edge to TF/TD (TK input, TF output)

TF setup time before TK edge (TK output)

TF hold time after TK edge (TK output)

TK edge to TF/TD (TK output, TF input)

TF setup time before TK edge (TK input)

TF hold time after TK edge (TK input)

TK edge to TF/TD (TK input, TF input)

RF/RD setup time before RK edge (RK input)

RF/RD hold time after RK edge (RK input)

RK edge to RF (RK input)

RF/RD setup time before RK edge (RK output)

RF/RD hold time after RK edge (RK output)

RK edge to RF (RK output)

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