- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25638 > MQ80C154-36P883R (ATMEL CORP) 8-BIT, 36 MHz, MICROCONTROLLER, CQFP44 PDF資料下載
參數(shù)資料
| 型號(hào)： | MQ80C154-36P883R |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 36 MHz, MICROCONTROLLER, CQFP44 |
| 封裝： | CERAMIC, QFP-44 |
| 文件頁數(shù)： | 11/46頁 |
| 文件大小： | 7004K |
| 代理商： | MQ80C154-36P883R |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
143
7593L–AVR–09/12
AT90USB64/128
15.10.17 TIMSK1 – Timer/Counter1 Interrupt Mask Register
15.10.18 TIMSK3 – Timer/Counter3 Interrupt Mask Register
Bit 5 – ICIEn: Timer/Countern, Input Capture Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Countern Input Capture interrupt is enabled. The corresponding Interrupt
Vector (see “Interrupts” on page 68) is executed when the ICFn Flag, located in TIFRn, is set.
Bit 3 – OCIEnC: Timer/Countern, Output Compare C Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Countern Output Compare C Match interrupt is enabled. The corresponding
Interrupt Vector (see “Interrupts” on page 68) is executed when the OCFnC Flag, located in
TIFRn, is set.
Bit 2 – OCIEnB: Timer/Countern, Output Compare B Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Countern Output Compare B Match interrupt is enabled. The corresponding
Interrupt Vector (see “Interrupts” on page 68) is executed when the OCFnB Flag, located in
TIFRn, is set.
Bit 1 – OCIEnA: Timer/Countern, Output Compare A Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Countern Output Compare A Match interrupt is enabled. The corresponding
Interrupt Vector (see “Interrupts” on page 68) is executed when the OCFnA Flag, located in
TIFRn, is set.
Bit 0 – TOIEn: Timer/Countern, Overflow Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Countern Overflow interrupt is enabled. The corresponding Interrupt Vector
(see “Interrupts” on page 68) is executed when the TOVn Flag, located in TIFRn, is set.
15.10.19 TIFR1 – Timer/Counter1 Interrupt Flag Register
15.10.20 TIFR3 – Timer/Counter3 Interrupt Flag Register
Bit
7
65
43
2
1
0
–
–ICIE1
–
OCIE1C
OCIE1B
OCIE1A
TOIE1
TIMSK1
Read/write
R
R/W
R
R/W
Initial value
0
Bit
7
65
43
2
1
0
–
–ICIE3
–
OCIE3C
OCIE3B
OCIE3A
TOIE3
TIMSK3
Read/write
R
R/W
R
R/W
Initial value
0
Bit
7
65
43
21
0
–
–ICF1
–
OCF1C
OCF1B
OCF1A
TOV1
TIFR1
Read/write
R
R/W
R
R/W
Initial value
00
Bit
7
65
43
21
0
–
–ICF3
–
OCF3C
OCF3B
OCF3A
TOV3
TIFR3
Read/write
R
R/W
R
R/W
Initial value
00
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MD80C52EXXX-25 | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40 |
| MR80C52XXX-36SHXXX | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44 |
| MQ83C154TXXX-20/883R | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44 |
| MQ83C154TXXX-20P883D | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44 |
| MD83C154DTXXX-20/883D | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CDIP40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MQ80C154-L16 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MQ80C186-10/BYA | 制造商:Rochester Electronics LLC 功能描述: |
| MQ80C186-12/BYA | 制造商:Rochester Electronics LLC 功能描述: |
| MQ80C186-12/BYC | 制造商:Rochester Electronics LLC 功能描述: |
| MQ80C186-12/R | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。