
3–254
Motorola Sensor Device Data
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08CA A1 21                      CMP  #33        have we shifted all possible bits in the DVSOR yet 
08CC 26 F1                      BNE  DIV151     no
*
08CE B7 98              DIV153  STA  CNT        save the loop counter so we can do the divide
*
08D0 B6 8F              DIV163  LDA  DVDND+3    sub 32 bit divisor from dividend
08D2 B0 93                      SUB  DVSOR+3    *
08D4 B7 8F                      STA  DVDND+3    *
08D6 B6 8E                      LDA  DVDND+2    *
08D8 B2 92                      SBC  DVSOR+2    *
08DA B7 8E                      STA  DVDND+2    *
08DC B6 8D                      LDA  DVDND+1    *
08DE B2 91                      SBC  DVSOR+1    *
08E0 B7 8D                      STA  DVDND+1    *
08E2 B6 8C                      LDA  DVDND      *
08E4 B2 90                      SBC  DVSOR      *
08E6 B7 8C                      STA  DVDND      *
08E8 24 1B                      BCC  DIV165     carry is clear if DVSOR was larger than DVDND
*
08EA B6 8F                      LDA  DVDND+3    add the divisor back...was larger than the dividend
08EC BB 93                      ADD  DVSOR+3    *
08EE B7 8F                      STA  DVDND+3    *
08F0 B6 8E                      LDA  DVDND+2    *
08F2 B9 92                      ADC  DVSOR+2    *
08F4 B7 8E                      STA  DVDND+2    *
08F6 B6 8D                      LDA  DVDND+1    *
08F8 B9 91                      ADC  DVSOR+1    *
08FA B7 8D                      STA  DVDND+1    *
08FC B6 8C                      LDA  DVDND      *
08FE B9 90                      ADC  DVSOR      *
0900 B7 8C                      STA  DVDND      *
0902 98                         CLC             this will clear the respective bit in QUO due to
*                       the need to add DVSOR back to DVND
0903 20 01                      BRA  DIV167
0905 99                 DIV165  SEC             this will set the respective bit in QUO
0906 39 97              DIV167  ROL  QUO+3      set or clear the low order bit in QUO based on above
0908 39 96                      ROL  QUO+2      *
090A 39 95                      ROL  QUO+1      *
090C 39 94                      ROL  QUO        *
090E 34 90                      LSR  DVSOR      divide the divisor by 2
0910 36 91                      ROR  DVSOR+1    *
0912 36 92                      ROR  DVSOR+2    *
0914 36 93                      ROR  DVSOR+3    *
0916 3A 98                      DEC  CNT        bump the loop counter down
0918 26 B6                      BNE  DIV163     finished yet 
091A 81                         RTSyes
*
#endasm
091B 81        RTS                }
/***************************************************************************/
/* These interrupts are not used...give them a graceful return if for
some reason one occurs */
1FFC 09 1C                        __SWI(){}
091C 80        RTI                
1FFA 09 1D                        IRQ(){}
091D 80        RTI                
1FF8 09 1E                        TIMERCAP(){}
091E 80        RTI                
1FF4 09 1F                        TIMEROV(){}
091F 80        RTI                
1FF2 09 20                        SCI(){}
0920 80        RTI
/***************************************************************************/
void sensor_type()
{
0921 B6 03     LDA    $03         k = portd & 0x0e;  /* we only care about bits 1..3 */
0923 A4 0E     AND    #$0E        
0925 B7 65     STA    $65         
0927 34 65     LSR    $65          k = k >> 1;    /* right justify the variable */
0929 B6 65     LDA    $65           if ( k > 4 )
092B A1 04     CMP    #$04        
F
Freescale Semiconductor, Inc.
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