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參數(shù)資料
| 型號： | MPC96877VKR2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 96877 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52 |
| 封裝： | 4.50 X 7 MM, 0.65 MM PITCH, LEAD FREE, MO-225BA, MAPBGA-52 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 395K |
| 代理商： | MPC96877VKR2 |
Advanced Clock Drivers Devices
2
Freescale Semiconductor
MPC96877
Figure 1. MPC96877 Logic Diagram
Y1
Y0
Y3
Y2
Y5
Y4
Y7
Y6
Y9
Y8
FBOUT
LD*
PLL
LD* OR OE
LD*, OS or OE
PLL bypass
OE
OS
AVDD
CK
10 K–100 K
GND
FBIN
* The Logic Detect (LD) powers down the device when a
logic low is applied to both CK and CK.
Powerdown
Control and
Test Logic
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