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參數(shù)資料
| 型號： | MPC961CFAR2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 961 SERIES, PLL BASED CLOCK DRIVER, 17 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | PLASTIC, LQFP-32 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 343K |
| 代理商： | MPC961CFAR2 |
5
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MPC961C/D
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
477
Low Voltage Zero Delay
Buffer
The MPC961 is a 2.5V or 3.3V compatible, 1:18 PLL based zero delay
buffer. With output frequencies of up to 200MHz, output skews of 150ps
the device meets the needs of the most demanding clock tree applica-
tions.
Fully Integrated PLL
Up to 200MHz I/O Frequency
LVCMOS Outputs
Outputs Disable in High Impedance
LVCMOS Reference Clock Options
LQFP Packaging
±50ps Cycle–Cycle Jitter
150ps Output Skews
The MPC961 is offered with two different input configurations. The
MPC961C offers an LVCMOS reference clock while the MPC961P offers
an LVPECL reference clock.
When pulled high the OE pin will force all of the outputs (except QFB)
into a high impedance state. Because the OE pin does not affect the QFB
output, down stream clocks can be disabled without the internal PLL los-
ing lock.
The MPC961 is fully 2.5V or 3.3V compatible and requires no external
loop filter components. All control inputs accept LVCMOS compatible lev-
els and the outputs provide low impedance LVCMOS outputs capable of
driving terminated 50
W transmission lines. For series terminated lines the
MPC961 can drive two lines per output giving the device an effective
fanout of 1:36. The device is packaged in a 32 lead LQFP.
Figure 1. MPC961C Logic Diagram
CCLK
FB_IN
Q0
Q14
QFB
O
PLL
1
F_RANGE
OE
Q1
Q2
Q3
Q15
Q16
Ref
FB
100 - 200 MHz
50 - 100 MHz
The MPC961C requires an external RC filter for the analog power supply pin VCCA. Please see applications section for details.
50k
Rev 1
MPC961C
LOW VOLTAGE
ZERO DELAY BUFFER
FA SUFFIX
32–LEAD LQFP PACKAGE
CASE 873A
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關PDF資料 |
PDF描述 |
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| MPC961CFA | 961 SERIES, PLL BASED CLOCK DRIVER, 17 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| MPC961CAC | 961 SERIES, PLL BASED CLOCK DRIVER, 17 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| MPC961CFA | MPC900 SERIES, PLL BASED CLOCK DRIVER, 17 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| MPC961PACR2 | 961 SERIES, PLL BASED CLOCK DRIVER, 17 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| MPC961PFAR2 | 961 SERIES, PLL BASED CLOCK DRIVER, 17 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MPC961PAC | 功能描述:時鐘緩沖器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| MPC961PACR2 | 功能描述:時鐘緩沖器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| MPC961PFA | 功能描述:IC ZDB PECL LV 1:18 32-LQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| MPC962305 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Low-Cost 3.3 V Zero Delay Buffer |
| MPC962305D-1 | 功能描述:IC CLOCK BUFFER 1:5 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
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