參數(shù)資料
型號: MPC93R51FAR2
廠商: MOTOROLA INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封裝: 7 X 7 MM, PLASTIC, LQFP-32
文件頁數(shù): 8/9頁
文件大?。?/td> 155K
代理商: MPC93R51FAR2
MPC93R51
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
137
Figure 7. Single versus Dual Waveforms
TIME (nS)
VOL
TAGE
(V)
3.0
2.5
2.0
1.5
1.0
0.5
0
2
4
6
8
10
12
14
OutB
tD = 3.9386
OutA
tD = 3.8956
In
Since this step is well above the threshold region it will not
cause any false clock triggering, however designers may be
uncomfortable with unwanted reflections on the line. To better
match the impedances when driving multiple lines the situation
in Figure 8 “Optimized Dual Line Termination” should be used.
In this case the series terminating resistors are reduced such
that when the parallel combination is added to the output buffer
impedance the line impedance is perfectly matched.
Figure 8. Optimized Dual Line Termination
14
MPC93R51
OUTPUT
BUFFER
RS = 22
ZO = 50
RS = 22
ZO = 50
14
+ 22 k 22 = 50 k 50
25
= 25
Figure 9. TCLK MPC93R51 AC test reference for Vcc = 3.3V
Figure 10. PCLK MPC93R51 AC test reference
Pulse
Generator
Z = 50W
RT = 50
ZO = 50
RT = 50
ZO = 50
MPC93R51 DUT
VTT
Differential
Pulse Generator
Z = 50W
RT = 50
ZO = 50
RT = 50
ZO = 50
MPC93R51 DUT
VTT
2
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