參數(shù)資料
型號： MPC8572EPXAULD
廠商： Freescale Semiconductor
文件頁數(shù)： 48/138頁
文件大?。?/td> 0K
描述： MPU POWERQUICC III 1023-PBGA
標(biāo)準(zhǔn)包裝： 1
系列： MPC85xx
處理器類型： 32-位 MPC85xx PowerQUICC III
速度： 1.333GHz
電壓： 1.1V
安裝類型： 表面貼裝
封裝/外殼： 1023-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 1023-FCPBGA（33x33）
包裝： 托盤
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
17
Input Clocks
4.4
DDR Clock Timing
Table 8 provides the DDR clock (DDRCLK) AC timing specifications for the MPC8572E.
EC_GTX_CLK125 rise and fall time
L/TVDD=2.5V
L/TVDD=3.3V
tG125R, tG125F
——
0.75
1.0
ns
1
EC_GTX_CLK125 duty cycle
GMII, TBI
1000Base-T for RGMII, RTBI
tG125H/tG125
45
47
—
55
53
%2, 3
Notes:
1. Rise and fall times for EC_GTX_CLK125 are measured from 0.5V and 2.0V for L/TVDD=2.5V, and from 0.6V and 2.7V
for L/TVDD=3.3V.
2. Timing is guaranteed by design and characterization.
3. EC_GTX_CLK125 is used to generate the GTX clock for the eTSEC transmitter with 2% degradation.
EC_GTX_CLK125 duty cycle can be loosened from 47/53% as long as the PHY device can tolerate the duty cycle
generated by the TSEC
for 10Base-T and 100Base-T reference clock.
Table 8. DDRCLK AC Timing Specifications
At recommended operating conditions with OVDD of 3.3V ± 5%.
Parameter/Condition
Symbol
Min
Typical
Max
Unit
Notes
DDRCLK frequency
fDDRCLK
66
—
100
MHz
1
DDRCLK cycle time
tDDRCLK
10.0
—
15.15
ns
—
DDRCLK rise and fall time
tKH, tKL
0.61.0
1.2ns
2
DDRCLK duty cycle
tKHK/tDDRCLK
40
—
60
%
3
DDRCLK jitter
—
+/– 150
ps
4, 5, 6
Notes:
1. Caution: The DDR complex clock to DDRCLK ratio settings must be chosen such that the resulting DDR complex
clock frequency does not exceed the maximum or minimum operating frequencies. Refer to Section 19.4,
“DDR/DDRCLK PLL Ratio,” for ratio settings.
2. Rise and fall times for DDRCLK are measured at 0.6 V and 2.7 V.
3. Timing is guaranteed by design and characterization.
4. This represents the total input jitter—short term and long term—and is guaranteed by design.
5. The DDRCLK driver’s closed loop jitter bandwidth should be <500 kHz at –20 dB. The bandwidth must be set low to
allow cascade-connected PLL-based devices to track DDRCLK drivers with the specified jitter.
6. For spread spectrum clocking, guidelines are +0% to –1% down spread at a modulation rate between 20 kHz and
60 kHz on DDRCLK.
Table 7. EC_GTX_CLK125 AC Timing Specifications (continued)
At recommended operating conditions with LVDD/TVDD of 3.3V ± 5% or 2.5V ± 5% (continued)
Parameter/Condition
Symbol
Min
Typical
Max
Unit
Notes
相關(guān)PDF資料
PDF描述
IDT70V25L20J8 IC SRAM 128KBIT 20NS 84PLCC
IDT7025L45J8 IC SRAM 128KBIT 45NS 84PLCC
MPC8572ELVTARLE MPU POWERQUICC III 1023FCPBGA
IDT7025L35J8 IC SRAM 128KBIT 35NS 84PLCC
XC4028XL-2BG256C IC FPGA C-TEMP 3.3V 2SPD 256PBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8572EPXAULE 功能描述:微處理器 - MPU 38H R211 Enc SnPb 1333 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8572EPXAVNB 功能描述:微處理器 - MPU RV1.1.1 SNPB 1500 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8572EPXAVND 功能描述:微處理器 - MPU 32-BIT CMOS 1.5GHz RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8572EPXAVNE 功能描述:微處理器 - MPU 38H R211 Enc SnPb 1500 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8572EVTARLB 功能描述:微處理器 - MPU RV1.1.1 1067 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*