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| 型號(hào)： | MPC8572CVTARND |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 1067 MHz, MICROPROCESSOR, PBGA1023 |
| 封裝： | 33 X 33 MM, LEAD FREE, PLASTIC, FCBGA-1023 |
| 文件頁(yè)數(shù)： | 127/138頁(yè) |
| 文件大?。?/td> | 1502K |
| 代理商： | MPC8572CVTARND |
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MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
89
PCI Express
16.5
Receiver Compliance Eye Diagrams
The RX eye diagram in Figure 56 is specified using the passive compliance/test measurement load (see
Figure 57) in place of any real PCI Express RX component.
Note: In general, the minimum Receiver eye diagram measured with the compliance/test measurement
load (see Figure 57) will be larger than the minimum Receiver eye diagram measured over a range of
systems at the input Receiver of any real PCI Express component. The degraded eye diagram at the input
Receiver is due to traces internal to the package as well as silicon parasitic characteristics which cause the
real PCI Express component to vary in impedance from the compliance/test measurement load. The input
Receiver eye diagram is implementation specific and is not specified. RX component designer should
provide additional margin to adequately compensate for the degraded minimum Receiver eye diagram
(shown in Figure 56) expected at the input Receiver based on some adequate combination of system
simulations and the Return Loss measured looking into the RX package and silicon. The RX eye diagram
must be aligned in time using the jitter median to locate the center of the eye diagram.
The eye diagram must be valid for any 250 consecutive UIs.
A recovered TX UI is calculated over 3500 consecutive unit intervals of sample data. The eye diagram is
created using all edges of the 250 consecutive UI in the center of the 3500 UI used for calculating the TX
UI.
NOTE
The reference impedance for return loss measurements is 50. to ground for
both the D+ and D- line (i.e., as measured by a Vector Network Analyzer
with 50. probes—see Figure 57). Note that the series capacitors, CTX, are
optional for the return loss measurement.
Figure 56. Minimum Receiver Eye Timing and Voltage Compliance Specification
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| MPC8572ECVTARNB | 32-BIT, 1067 MHz, MICROPROCESSOR, PBGA1023 |
| MPC8572ECPXARLD | 32-BIT, 1067 MHz, MICROPROCESSOR, PBGA1023 |
| MPC8572ECVTAVLD | 32-BIT, 1500 MHz, MICROPROCESSOR, PBGA1023 |
| MPC8572CVTAVND | 32-BIT, 1500 MHz, MICROPROCESSOR, PBGA1023 |
| MPC8572ECPXATND | 32-BIT, 1200 MHz, MICROPROCESSOR, PBGA1023 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8572CVTAVNE | 功能描述:微處理器 - MPU R211 NoE NoPb 1500 Ext RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8572DS | 功能描述:開(kāi)發(fā)板和工具包 - 其他處理器 MICRO-ATX HIGH PERFORMAN RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| MPC8572EAMC | 功能描述:微處理器 - MPU MPC8572 AMC RAPID SYSTEM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8572EAMC-SA | 制造商:Freescale Semiconductor 功能描述:MPC8572 AMC RAPID SYSTEM - Bulk |
| MPC8572ECLPXARLE | 功能描述:微處理器 - MPU R211 Enc SnPb 1067LP Ext RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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