參數(shù)資料
型號: MPC8569EVTANKGB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: RISC PROCESSOR, PBGA783
封裝: 29 X 29 MM, 1 MM PITCH, PLASTIC, BGA-783
文件頁數(shù): 69/126頁
文件大?。?/td> 2847K
代理商: MPC8569EVTANKGB
DDR2 and DDR3 SDRAM Controller
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
47
The following table provides the DDR controller interface capacitance for DDR2 and DDR3.
The following table provides the current draw characteristics for MVREFn.
Input high voltage
VIH
MVREFn + 0.100
GVDD
V5
Input low voltage
VIL
GND
MVREFn – 0.100
V
5
I/O leakage current
IOZ
–50
50
μA6
Notes:
1. GVDD is expected to be within 50 mV of the DRAM’s voltage supply at all times. The DRAM’s and memory controller’s voltage
supply may or may not be from the same source.
2. MVREFn is expected to be equal to 0.5
× GVDD and to track GVDD DC variations as measured at the receiver. Peak-to-peak
noise on MVREFn may not exceed the MVREFn DC level by more than ±1% of GVDD (that is, ± 15 mV).
3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made, and it is expected to be
equal to MVREFn with a min value of MVREFn – 0.04 and a max value of MVREFn +0.04. VTT should track variations in the
DC level of MVREFn.
4. The voltage regulator for MVREFn must meet the specifications stated in Table 16.
5. Input capacitance load for DQ, DQS, and DQS are available in the IBIS models.
6. Output leakage is measured with all outputs disabled, 0 V
V
OUT GVDD.
Table 15. DDR2 and DDR3 SDRAM Capacitance
At recommended operating conditions with GVDD of 1.8 V ± 5% for DDR2 or 1.5 V ± 5% for DDR3
Parameter
Symbol
Min
Max
Unit
Notes
Input/output capacitance: DQ, DQS, DQS
CIO
6
8
pF
1, 2
Delta input/output capacitance: DQ, DQS,
DQS
CDIO
0.5
pF
1, 2
Note:
1. This parameter is sampled. GVDD = 1.8 V ± 0.1 V (for DDR2), f = 1 MHz, TA =25°C, VOUT = GVDD/2, VOUT
(peak-to-peak) = 0.2 V.
2. This parameter is sampled. GVDD = 1.5 V ± 0.075 V (for DDR3), f = 1 MHz, TA =25°C, VOUT = GVDD/2, VOUT
(peak-to-peak) = 0.175 V.
Table 16. Current Draw Characteristics for MVREFn
For recommended operating conditions, see Table 3.
Parameter
Symbol
Min
Max
Unit
Notes
Current draw for DDR2 SDRAM for MVREFn
IMVREFn
300
μA—
Current draw for DDR3 SDRAM for MVREFn
IMVREFn
250
μA—
Table 14. DDR3 SDRAM Interface DC Electrical Characteristics (continued)
At recommended operating condition with GVDD =1.5 V
1
Parameter
Symbol
Min
Max
Unit
Note
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