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| 型號： | MPC8548ECVTAUJB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 114/151頁 |
| 文件大小： | 0K |
| 描述： | MPU POWERQUICC III 783-PBGA |
| 產(chǎn)品培訓(xùn)模塊： | MPC8548 PowerQUICC III Processors |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MPC85xx |
| 處理器類型： | 32-位 MPC85xx PowerQUICC III |
| 速度： | 1.333GHz |
| 電壓： | 1.1V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 783-BBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 783-FCPBGA（29x29） |
| 包裝： | 托盤 |
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MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
Freescale Semiconductor
65
High-Speed Serial Interfaces (HSSI)
16 High-Speed Serial Interfaces (HSSI)
The device features one Serializer/Deserializer (SerDes) interface to be used for high-speed serial
interconnect applications. The SerDes interface can be used for PCI Express and/or serial RapidIO data
transfers.
This section describes the common portion of SerDes DC electrical specifications, which is the DC
requirement for SerDes reference clocks. The SerDes data lane’s transmitter and receiver reference circuits
are also shown.
16.1
Signal Terms Definition
The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms
used in the description and specification of differential signals.
Figure 38 shows how the signals are defined. For illustration purpose, only one SerDes lane is used for the
description. The figure shows a waveform for either a transmitter output (SD_TX and SD_TX) or a
receiver input (SD_RX and SD_RX). Each signal swings between A volts and B volts where A > B.
Using this waveform, the definitions are as follows. To simplify the illustration, the following definitions
assume that the SerDes transmitter and receiver operate in a fully symmetrical differential signaling
environment.
Single-ended swing
The transmitter output signals and the receiver input signals SD_TX, SD_TX, SD_RX and SD_RX
each have a peak-to-peak swing of A – B volts. This is also referred as each signal wire’s
single-ended swing.
Differential output voltage, VOD (or differential output swing):
The differential output voltage (or swing) of the transmitter, VOD, is defined as the difference of
the two complimentary output voltages: VSD_TX –VSD_TX. The VOD value can be either positive
or negative.
Differential input voltage, VID (or differential input swing):
The differential input voltage (or swing) of the receiver, VID, is defined as the difference of the two
complimentary input voltages: VSD_RX –VSD_RX. The VID value can be either positive or
negative.
Differential peak voltage, VDIFFp
The peak value of the differential transmitter output signal or the differential receiver input signal
is defined as differential peak voltage, VDIFFp = |A – B| volts.
Differential peak-to-peak, VDIFFp-p
Because the differential output signal of the transmitter and the differential input signal of the
receiver each range from A – B to –(A – B) volts, the peak-to-peak value of the differential
transmitter output signal or the differential receiver input signal is defined as differential
peak-to-peak voltage, VDIFFp-p = 2 VDIFFp = 2 |(A – B)| volts, which is twice of differential
swing in amplitude, or twice of the differential peak. For example, the output differential
peak-to-peak voltage can also be calculated as VTX-DIFFp-p = 2 |VOD|.
Common mode voltage, Vcm
The common mode voltage is equal to one half of the sum of the voltages between each conductor
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| MPC8548ECVTAUJC | 功能描述:微處理器 - MPU REV2.1.3 FG Part RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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