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參數(shù)資料
型號： MPC8548ECVTATGB
廠商： Freescale Semiconductor
文件頁數(shù)： 42/151頁
文件大?。?/td> 0K
描述： MPU POWERQUICC III 783-PBGA
產(chǎn)品培訓(xùn)模塊： MPC8548 PowerQUICC III Processors
標準包裝： 1
系列： MPC85xx
處理器類型： 32-位 MPC85xx PowerQUICC III
速度： 1.2GHz
電壓： 1.1V
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
136
Freescale Semiconductor
System Design Information
level must always be equivalent to VDD, and preferably these voltages are derived directly from VDD
through a low frequency filter scheme such as the following.
There are a number of ways to reliably provide power to the PLLs, but the recommended solution is to
provide independent filter circuits per PLL power supply as illustrated in Figure 57, one to each of the
AVDD pins. By providing independent filters to each PLL the opportunity to cause noise injection from
one PLL to the other is reduced.
This circuit is intended to filter noise in the PLLs resonant frequency range from a 500 kHz to 10 MHz
range. It must be built with surface mount capacitors with minimum Effective Series Inductance (ESL).
Consistent with the recommendations of Dr. Howard Johnson in High Speed Digital Design: A Handbook
of Black Magic (Prentice Hall, 1993), multiple small capacitors of equal value are recommended over a
single large value capacitor.
Each circuit must be placed as close as possible to the specific AVDD pin being supplied to minimize noise
coupled from nearby circuits. It must be routed directly from the capacitors to the AVDD pin, which is on
the periphery of the footprint, without the inductance of vias.
Figure 57 through Figure 59 shows the PLL power supply filter circuits.
Figure 57. PLL Power Supply Filter Circuit with PLAT Pins
Figure 58. PLL Power Supply Filter Circuit with CORE Pins
Figure 59. PLL Power Supply Filter Circuit with PCI/LBIU Pins
The AVDD_SRDS signal provides power for the analog portions of the SerDes PLL. To ensure stability of
the internal clock, the power supplied to the PLL is filtered using a circuit similar to the one shown in
following figure. For maximum effectiveness, the filter circuit is placed as closely as possible to the
AVDD_SRDS ball to ensure it filters out as much noise as possible. The ground connection must be near
the AVDD_SRDS ball. The 0.003-F capacitor is closest to the ball, followed by the two 2.2 F capacitors,
and finally the 1
resistor to the board supply plane. The capacitors are connected from AV
DD_SRDS to
VDD
AVDD_PLAT
2.2 F
GND
Low ESL Surface Mount Capacitors
150
VDD
AVDD_CORE
2.2 F
GND
Low ESL Surface Mount Capacitors
180
VDD
AVDD_PCI/AVDD_LBIU
2.2 F
GND
Low ESL Surface Mount Capacitors
10
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8548ECVTAUJA 制造商:Freescale Semiconductor 功能描述:MPC85XX RISC 32-BIT CMOS 1.333GHZ 1.8V/2.5V/3.3V 783-PIN BGA - Bulk
MPC8548ECVTAUJB 功能描述:微處理器 - MPU FG PQ38 8548 PB Free RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8548ECVTAUJC 功能描述:微處理器 - MPU REV2.1.3 FG Part RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8548ECVTAUJD 功能描述:微處理器 - MPU PQ38 XT WE 1333 R3.0 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8548ECVUAQG 功能描述:微處理器 - MPU PQ38 8548E PB-FREE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
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