參數(shù)資料
型號: MPC8379EVRANG
廠商: Freescale Semiconductor
文件頁數(shù): 67/127頁
文件大?。?/td> 0K
描述: MPU PWRQUICC II 800MHZ 689TEPBGA
標準包裝: 27
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 800MHz
電壓: 1.05V
安裝類型: 表面貼裝
封裝/外殼: 689-BBGA 裸露焊盤
供應商設備封裝: 689-TEPBGA II(31x31)
包裝: 托盤
配用: MPC8377E-RDBA-ND - BOARD REF DES MPC8377 REV 2.1
MPC8377E-MDS-PB-ND - BOARD MODULAR DEV SYSTEM
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
44
Freescale Semiconductor
Figure 25. Local Bus Signals, GPCM/UPM Signals for LCRR[CLKDIV] = 4 (PLL Bypass Mode)
11 Enhanced Secure Digital Host Controller (eSDHC)
This section describes the DC and AC electrical specifications for the eSDHC (SD/MMC) interface of the
chip.
The eSDHC controller always uses the falling edge of the SD_CLK in order to drive the
SD_DAT[0:3]/CMD as outputs and sample the SD_DAT[0:3] as inputs. This behavior is true for both full-
and high-speed modes.
Note that this is a non-standard implementation, as the SD card specification assumes that in high-speed
mode, data is driven at the rising edge of the clock.
LCLK
UPM Mode Input Signal:
LUPWAIT
tLBIXKH
tLBIVKH
tLBIXKH
T1
T3
GPCM Mode Output Signals:
LCS[0:7]/LWE[0:3]
tLBKHOV
tLBKHOZ
T2
T4
Input Signals:
LAD[0:31]
UPM Mode Output Signals:
LCS[0:7]/LBS[0:1]/LGPL[0:5]
tLBKHOV
Output (Data) Signals:
LAD[0:31]/LDP[0:3]
Output (Address) Signal:
LAD[0:31]
tLBKHOZ
tLBKHOV
相關PDF資料
PDF描述
2-84533-7 CONN FFC 27POS 1.25MM RT ANG
355-012-520-201 CARDEDGE 12POS DL .156 LOPRO BLK
MPC8379EVRAJF MPU PWRQUICC II 533MHZ 689TEPBGA
355-012-500-204 CARDEDGE 12POS DL .156 LOPRO BLK
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相關代理商/技術參數(shù)
參數(shù)描述
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