- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3947 > MPC8379EVRANG (Freescale Semiconductor)MPU PWRQUICC II 800MHZ 689TEPBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | MPC8379EVRANG |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 105/127頁 |
| 文件大小： | 0K |
| 描述： | MPU PWRQUICC II 800MHZ 689TEPBGA |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 800MHz |
| 電壓： | 1.05V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 689-BBGA 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 689-TEPBGA II（31x31） |
| 包裝： | 托盤 |
| 配用： | MPC8377E-RDBA-ND - BOARD REF DES MPC8377 REV 2.1 MPC8377E-MDS-PB-ND - BOARD MODULAR DEV SYSTEM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁當(dāng)前第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
Freescale Semiconductor
79
Using this waveform, the definitions are as follows. To simplify illustration, the following definitions
assume that the SerDes transmitter and receiver operate in a fully symmetrical differential signaling
environment.
Single-Ended Swing
The transmitter output signals and the receiver input signals SDn_TX, SDn_TX, SDn_RX and
SDn_RX each have a peak-to-peak swing of A – B volts. This is also referred as each signal wire’s
single-ended swing.
Differential Output Voltage, VOD (or Differential Output Swing):
The differential output voltage (or swing) of the transmitter, VOD, is defined as the difference of
the two complimentary output voltages: VSDn_TX – VSDn_TX. The VOD value can be either positive
or negative.
Differential Input Voltage, VID (or Differential Input Swing):
The differential input voltage (or swing) of the receiver, VID, is defined as the difference of the two
complimentary input voltages: VSDn_RX – VSDn_RX. The VID value can be either positive or
negative.
Differential Peak Voltage, VDIFFp
The peak value of the differential transmitter output signal or the differential receiver input signal
is defined as differential peak voltage, VDIFFp = |A – B| volts.
Differential Peak-to-Peak, VDIFFp-p
Since the differential output signal of the transmitter and the differential input signal of the receiver
each range from A – B to –(A – B) volts, the peak-to-peak value of the differential transmitter
output signal or the differential receiver input signal is defined as differential peak-to-peak voltage,
VDIFFp-p =2 × VDIFFp = 2 × |(A – B)| volts, which is twice of differential swing in amplitude, or
twice of the differential peak. For example, the output differential peak-peak voltage can also be
calculated as VTX-DIFFp-p = 2 × |VOD|.
Differential Waveform
The differential waveform is constructed by subtracting the inverting signal (SDn_TX, for
example) from the non-inverting signal (SDn_TX, for example) within a differential pair. There is
only one signal trace curve in a differential waveform. The voltage represented in the differential
waveform is not referenced to ground. Refer to Figure 60 as an example for differential waveform.
Common Mode Voltage, Vcm
The common mode voltage is equal to one half of the sum of the voltages between each conductor
of a balanced interchange circuit and ground. In this example, for SerDes output,
Vcm_out =(VSDn_TX +VSDn_TX) ÷ 2=(A + B) ÷ 2, which is the arithmetic mean of the two
complimentary output voltages within a differential pair. In a system, the common mode voltage
may often differ from one component’s output to the other’s input. Sometimes it may be even
different between the receiver input and driver output circuits within the same component. It is also
referred as the DC offset in some occasion.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 2-84533-7 | CONN FFC 27POS 1.25MM RT ANG |
| 355-012-520-201 | CARDEDGE 12POS DL .156 LOPRO BLK |
| MPC8379EVRAJF | MPU PWRQUICC II 533MHZ 689TEPBGA |
| 355-012-500-204 | CARDEDGE 12POS DL .156 LOPRO BLK |
| 355-012-500-202 | CARDEDGE 12POS DL .156 LOPRO BLK |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8379EVRANGA | 功能描述:微處理器 - MPU 8379 PBGA ST PbFr W/ENC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8379EZQAFDA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379EZQAFFA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379EZQAFGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379EZQAGDA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。