參數(shù)資料
型號(hào)： MPC8343EZQAGDX
廠商： FREESCALE SEMICONDUCTOR INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, MICROPROCESSOR, PBGA620
封裝： 29 X 29 MM, 2.46 MM HEIGHT, 1 MM PITCH, PLASTIC, BGA-620
文件頁(yè)數(shù)： 27/92頁(yè)
文件大小： 987K
代理商： MPC8343EZQAGDX
MPC8343E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 6
Freescale Semiconductor
33
Local Bus
Local bus clock to output valid
(except LAD/LDP and LALE)
tLBKHOV1
—4.5
ns
Local bus clock to data valid for
LAD/LDP
tLBKHOV2
—4.5
ns
3
Local bus clock to address valid for
LAD
tLBKHOV3
—4.5
ns
3
Output hold from local bus clock
(except LAD/LDP and LALE)
tLBKHOX1
1—
ns
3
Output hold from local bus clock for
LAD/LDP
tLBKHOX2
1—
ns
3
Local bus clock to output high
impedance for LAD/LDP
tLBKHOZ
—3.8
ns
Notes:
1. The symbols used for timing specifications herein follow the pattern of t(First two letters of
functional block)(signal)(state) (reference)(state) for inputs and t(First two letters of functional
block)(reference)(state)(signal)(state) for outputs. For example, tLBIXKH1 symbolizes local bus
timing (LB) for the input (I) to go invalid (X) with respect to the time the tLBK clock reference
(K) goes high (H), in this case for clock one(1). Also, tLBKHOX symbolizes local bus timing
(LB) for the tLBK clock reference (K) to go high (H), with respect to the output (O) going
invalid (X) or output hold time.
2. All timings are in reference to rising edge of LSYNC_IN.
3. All signals are measured from OVDD/2 of the rising edge of LSYNC_IN to 0.4 × OVDD of
the signal in question for 3.3-V signaling levels.
4. Input timings are measured at the pin.
5.tLBOTOT1 should be used when RCWH[LALE] is not set and when the load on LALE output
pin is at least 10pF less than the load on LAD output pins.
6.tLBOTOT2 should be used when RCWH[LALE] is set and when the load on LALE output pin
is at least 10pF less than the load on LAD output pins.
7.tLBOTOT3 should be used when RCWH[LALE] is set and when the load on LALE output pin
equals to the load on LAD output pins.
8. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be
when the total current delivered through the component pin is less than or equal to the
leakage current specification.
Table 28. Local Bus General Timing Parameters—DLL bypass
Parameter
Symbol 1
Min
Max
Unit
Notes
Local bus cycle time
tLBK
15
—
ns
2
Input setup to local bus clock
tLBIVKH
7
—
ns
3, 4
Input hold from local bus clock
tLBIXKH
1.0
—
ns
3, 4
LALE output fall to LAD output
transition (LATCH hold time)
tLBOTOT1
1.5
—
ns
5
Table 27. Local Bus General Timing Parameters—DLL on (continued)
Parameter
Symbol 1
Min
Max
Unit
Notes
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MPC8343VRAGDB 功能描述:微處理器 - MPU 8347 PBGA NOPB W/O ENC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
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