參數(shù)資料
型號(hào): MPC8343CVRAGD
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 65/80頁(yè)
文件大?。?/td> 0K
描述: IC MPU PWRQUICC II PRO 620-PBGA
標(biāo)準(zhǔn)包裝: 36
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 620-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 620-PBGA(29x29)
包裝: 托盤
MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
68
Freescale Semiconductor
Thermal
20 Thermal
This section describes the thermal specifications of the MPC8343EA.
20.1
Thermal Characteristics
.Table 59 provides the package thermal characteristics for the 620 29
× 29 mm PBGA of the MPC8343EA.
20.2
Thermal Management Information
For the following sections, PD = (VDD × IDD) + PI/O where PI/O is the power dissipation of the I/O drivers.
See Table 5 for I/O power dissipation values.
20.2.1
Estimation of Junction Temperature with Junction-to-Ambient
Thermal Resistance
An estimation of the chip junction temperature, TJ, can be obtained from the equation:
TJ = TA + (RθJA × PD)
where:
TJ = junction temperature (°C)
TA = ambient temperature for the package (°C)
RθJA = junction-to-ambient thermal resistance (°C/W)
PD = power dissipation in the package (W)
Table 59. Package Thermal Characteristics for PBGA
Parameter
Symbol
Value
Unit
Notes
Junction-to-ambient natural convection on single-layer board (1s)
RθJA
21
°C/W
1, 2
Junction-to-ambient natural convection on four-layer board (2s2p)
RθJMA
15
°C/W
1, 3
Junction-to-ambient (at 200 ft/min) on single-layer board (1s)
RθJMA
17
°C/W
1, 3
Junction-to-ambient (at 200 ft/min) on four-layer board (2s2p)
RθJMA
12
°C/W
1, 3
Junction-to-board thermal
RθJB
6
°C/W
4
Junction-to-case thermal
RθJC
5
°C/W
5
Junction-to-package natural convection on top
ψ
JT
5
°C/W
6
Notes
1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2. Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board horizontal.
3. Per JEDEC JESD51-6 with the board horizontal.
4. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on
the top surface of the board near the package.
5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1).
6. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature
per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.
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