參數(shù)資料
型號: MPC8315VRAFDA
廠商: Freescale Semiconductor
文件頁數(shù): 80/106頁
文件大?。?/td> 0K
描述: MPU POWERQUICC II PRO 620-PBGA
標準包裝: 36
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 333MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 620-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 620-PBGA(29x29)
包裝: 托盤
MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
75
TDM
22.2
TDM AC Electrical Characteristics
This table provides the TDM AC timing specifications.
This figure shows the TDM receive signal timing.
Figure 59. TDM Receive Signals
Table 69. TDM AC Timing specifications
Parameter/Condition
Symbol
Min
Max
Unit
TDMxRCK/TDMxTCK
tDM
20.0
ns
TDMxRCK/TDMxTCK high pulse width
tDM_HIGH
8.0
ns
TDMxRCK/TDMxTCK low pulse width
tDM_LOW
8.0
ns
TDMxRCK/TDMxTCK rise time (20% to 80%)
tDMKH
1.0
4.0
ns
TDMxRCK/TDMxTCK fall time (80% to 20%)
tDMKL
1.0
4.0
ns
TDM all input setup time
tDMIVKH
3.0
ns
TDMxRD hold time
tDMRDIXKH
3.5
ns
TDMxTFS/TDMxRFS input hold time
tDMFSIXKH
2.0
ns
TDMxTCK High to TDMxTD output active
tDM_OUTAC
4.0
ns
TDMxTCK High to TDMxTD output valid
tDMTKHOV
14.0
ns
TDMxTD hold time
tDMTKHOX
2.0
ns
TDMxTCK High to TDMxTD output high impedance
tDM_OUTHI
10.0
ns
TDMxTFS/TDMxRFS output valid
tDMFSKHOV
13.5
ns
TDMxTFS/TDMxRFS output hold time
tDMFSKHOX
2.5
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tTDMIVKH symbolizes TDM timing
(DM) with respect to the time the input signals (I) reach the valid state (V) relative to the TDM Clock, tTC, reference (K) going to
the high (H) state or setup time. Also, output signals (O), hold (X).
2. Output values are based on 30 pF capacitive load.
3. Inputs are referenced to the sampling that the TDM is programmed to use. Outputs are referenced to the programming edge
they are programmed to use. Use of the rising edge or falling edge as a reference is programmable. TDMxTCK and TDMxRCK
are shown using the rising edge.
TDMxRCK
TDMxRD
TDMxRFS
TDMxRFS (output)
~ ~
tDM
tDM_HIGH
tDM_LOW
tDMIVKH
tDMRDIXKH
tDMFSIXKH
tDMFSKHOV
tDMFSKHOX
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