參數(shù)資料
型號： MPC8315VRAFDA
廠商： Freescale Semiconductor
文件頁數(shù)： 44/106頁
文件大?。?/td> 0K
描述： MPU POWERQUICC II PRO 620-PBGA
標準包裝： 36
系列： MPC83xx
處理器類型： 32-位 MPC83xx PowerQUICC II Pro
速度： 333MHz
電壓： 1V
安裝類型： 表面貼裝
封裝/外殼： 620-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 620-PBGA（29x29）
包裝： 托盤
MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
42
Freescale Semiconductor
Local Bus
This figure provides the AC test load for the local bus.
Figure 24. Local Bus AC Test Load
Input hold from local bus clock
tLBIXKH
1.0
—
ns
3, 4
LALE output fall to LAD output transition (LATCH hold time)
tLBOTOT1
1.5
—
ns
5
LALE output fall to LAD output transition (LATCH hold time)
tLBOTOT2
3—
ns
6
LALE output fall to LAD output transition (LATCH hold time)
tLBOTOT3
2.5
—
ns
7
Local bus clock to output valid
tLBKHOV
—3
ns
3
Local bus clock to output high impedance for LAD
tLBKHOZ
—4
ns
8
LALE output rise to LCLK negative edge
tLALEHOV
—3.0
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(First two letters of functional
block)(signal)(state)(reference)(state) for inputs and t(First two letters of functional block)(reference)(state)(signal)(state) for outputs. For
example, tLBIXKH1 symbolizes local bus timing (LB) for the input (I) to go invalid (X) with respect to the time the tLBK clock
reference (K) goes high (H), in this case for clock one(1). Also, tLBKHOX symbolizes local bus timing (LB) for the tLBK clock
reference (K) to go high (H), with respect to the output (O) going invalid (X) or output hold time.
2. All timings are in reference to falling edge of LCLK0 (for all outputs and for LGTA and LUPWAIT inputs) or rising edge of
LCLK0 (for all other inputs).
3. All signals are measured from NVDD/2 of the rising/falling edge of LCLK0 to 0.4
NVDD of the signal in question for 3.3-V
signaling levels.
4. Input timings are measured at the pin.
5. tLBOTOT1 should be used when RCWH[LALE] is not set and the load on LALE output pin is at least 10pF less than the load
on LAD output pins.
6. tLBOTOT2 should be used when RCWH[LALE] is set and the load on LALE output pin is at least 10pF less than the load on
LAD output pins.
7. tLBOTOT3 should be used when RCWH[LALE] is set and the load on LALE output pin equals to the load on LAD output pins.
8. For active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered through the
component pin is less than or equal to the leakage current specification.
Table 44. Local Bus General Timing Parameters (continued)
Parameter
Symbol 1
Min
Max
Unit
Note
Output
Z0 = 50
NVDD/2
RL = 50
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