參數(shù)資料
型號： MPC8280ZUUPEA
廠商： Freescale Semiconductor
文件頁數(shù)： 36/83頁
文件大小： 0K
描述： IC MPU POWERQUICC II 480-TBGA
標準包裝： 21
系列： MPC82xx
處理器類型： 32-位 MPC82xx PowerQUICC II
速度： 450MHz
電壓： 1.5V
安裝類型： 表面貼裝
封裝/外殼： 480-LBGA
供應(yīng)商設(shè)備封裝： 408-TBGA（37.5x37.5）
包裝： 托盤
其它名稱： MPC8280ZUUPE
MPC8280ZUUPE-ND
MPC8280 PowerQUICC II Family Hardware Specifications, Rev. 2
Freescale Semiconductor
41
Clock Configuration Modes
1110_011
50.0
66.7
5
250.0 333.3
4
500.0 666.6
2
125.0
166.7
1110_100
50.0
66.7
5
250.0 333.3
4
333.3 444.4
3
83.3
111.1
1110_101
50.0
66.7
5
250.0 333.3
4.5
375.0 500.0
3
83.3
111.1
1110_110
50.0
66.7
5
250.0 333.3
5
416.7 555.5
3
83.3
111.1
1110_111
50.0
66.7
5
250.0 333.3
5.5
458.3 611.1
3
83.3
111.1
1100_000
Reserved
1100_001
Reserved
1100_010
Reserved
1 The “l(fā)ow” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry
guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only. Users
must select a mode and input bus frequency so that the resulting configuration does not violate the frequency rating of the user’s
device. The minimum CPM frequency is 120 MHz. Minimum CPU frequency is determined by the clock mode. For modes with
a CPU multiplication factor <= 3, the minimum CPU frequency is 150 MHz for commercial temperature devices and 175 MHz
for extended temperature devices. For modes with a CPU multiplication factor >= 3.5: for Rev 0.1 the minimum CPU frequency
is 250 MHz; for Rev A or later the minimum CPU frequency is 150 MHz for commercial temperature devices and 175 MHz for
extended temperature devices.
2 As shown in Table 17, PCI_MODCK determines the PCI clock frequency range. See Table 20 for lower configurations.
3 MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.
4 CPM multiplication factor = CPM clock/PCI clock
5 CPU multiplication factor = Core PLL multiplication factor
Table 22. Clock Configurations for PCI Agent Mode (PCI_MODCK=1)1,2
Mode3
PCI Clock
(MHz)
CPM
Multiplication
Factor4
CPM Clock
(MHz)
CPU
Multiplication
Factor5
CPU Clock
(MHz)
Bus
Division
Factor
Bus Clock
(MHz)
MODCK_H-
MODCK[1-3]
Low
High
Low
High
Low
High
Low
High
Default Modes (MODCK_H=0000)
0000_000
30.0
50.0
4
120.0 200.0
2.5
150.0 250.0
2
60.0
100.0
0000_001
25.0
50.0
4
100.0 200.0
3
150.0 300.0
2
50.0
100.0
0000_010
25.0
50.0
6
150.0 300.0
3
150.0 300.0
3
50.0
100.0
0000_011
25.0
50.0
6
150.0 300.0
4
200.0 400.0
3
50.0
100.0
0000_100
25.0
50.0
6
150.0 300.0
3
180.0 360.0
2.5
60.0
120.0
0000_101
25.0
50.0
6
150.0 300.0
3.5
210.0 420.0
2.5
60.0
120.0
0000_110
25.0
50.0
8
200.0 400.0
3.5
233.3 466.7
3
66.7
133.3
Table 21. Clock Configurations for PCI Agent Mode (PCI_MODCK=0)1,2 (continued)
Mode3
PCI Clock
(MHz)
CPM
Multiplication
Factor4
CPM Clock
(MHz)
CPU
Multiplication
Factor5
CPU Clock
(MHz)
Bus
Division
Factor
Bus Clock
(MHz)
MODCK_H-
MODCK[1-3]
Low
High
Low
High
Low
High
Low
High
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