參數(shù)資料
型號(hào)： MPC8272ZQPIEX
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 300 MHz, RISC PROCESSOR, PBGA516
封裝： 27 X 27 MM, 1 MM PITCH, LEAD FREE, PLASTIC, MS-034AAL-1, BGA-516
文件頁(yè)數(shù)： 28/60頁(yè)
文件大小： 746K
代理商： MPC8272ZQPIEX
MPC8272 PowerQUICC II Family Hardware Specifications, Rev. 2
34
Freescale Semiconductor
Clock Configuration Modes
1110_001
50.0
100.0
3
150.0 300.0
4
200.0 400.0
6
25.0
50.0
1110_010
50.0
100.0
3
150.0 300.0
4.5
225.0 450.0
6
25.0
50.0
1110_011
50.0
100.0
3
150.0 300.0
5
250.0 500.0
6
25.0
50.0
1110_100
50.0
100.0
3
150.0 300.0
5.5
275.0 550.0
6
25.0
50.0
1100_000
Reserved
1100_001
Reserved
1100_010
Reserved
1
The “l(fā)ow” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a
table entry guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose
of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not
exceed the frequency rating of the user’s device. The minimum CPU frequency is 150 MHz for commercial
temperature devices and 175 MHz for extended temperature devices. The minimum CPM frequency is 120 MHz.
2
PCI_MODCK determines the PCI clock frequency range. Refer to Table 16 for higher range configurations.
3
MODCK_H = hard reset configuration word [28–31] (refer to Section 5.4 in the
MPC8260 User’s Manual).
MODCK[1-3] = three hardware configuration pins.
4
CPM multiplication factor = CPM clock/bus clock
5
CPU multiplication factor = Core PLL multiplication factor
6
CPM_CLK/PCI_CLK ratio. When PCI_MODCK = 1, the ratio of CPM_CLK/PCI_CLK should be calculated from
PCIDF as follows:
PCIDF = 3 > CPM_CLK/PCI_CLK = 4
PCIDF = 5 > CPM_CLK/PCI_CLK = 6
PCIDF = 7 > CPM_CLK/PCI_CLK = 8
PCIDF = 9 > CPM_CLK/PCI_CLK = 5
PCIDF = B > CPM_CLK/PCI_CLK = 6
Table 17. Clock Configurations for PCI Host Mode (PCI_MODCK=1) 1, 2 (continued)
Mode 3
Bus Clock
(MHz)
CPM
Multiplication
Factor 4
CPM Clock
(MHz)
CPU
Multiplication
Factor 5
CPU Clock
(MHz)
PCI
Division
Factor 6
PCI Clock
(MHz)
MODCK_H-
MODCK[1-3]
Low
High
Low
High
Low
High
Low
High
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