參數(shù)資料
型號: MPC8270CZUUPEA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 100 MHz, RISC PROCESSOR, PBGA480
封裝: 37 X 37 MM, 1.27 MM PITCH, FTBGA-480
文件頁數(shù): 93/156頁
文件大小: 1680K
代理商: MPC8270CZUUPEA
MOTOROLA
MPC8280 PowerQUICC II Family Hardware Specications
41
Pinout
8
Pinout
This section provides the pin assignments and pinout lists for both HiP7 PowerQUICC II packages.
8.1
ZU Package—MPC8280 and MPC8270
The following gures and table represent the standard 480 TBGA package. For information on the alternate
Figure 13 shows the pinout of the ZU package as viewed from the top surface.
1 “Low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency guarantees
the required minimum CPU operating frequency. Minimum CPU frequency is determined by the clock mode.
For modes with a CPU multiplication factor
≤ 3, the minimum CPU frequency is 166 MHz.The minimum CPM frequency
is 133 MHz.
For modes with a CPU multiplication factor
≥ 3.5, the minimum CPU frequency is 250 MHz. The minimum CPM
frequency is as shown in the table.
“High” values are for the purpose of illustration only. Users must select a mode and input bus frequency so that the
resulting conguration does not exceed the frequency rating of the user’s device.
2 As shown in Table 14, PCI_MODCK determines the PCI clock range. Refer to Table 18 for higher range congurations.
3 MODCK_H = hard reset conguration word [28–31]. MODCK[1-3] = three hardware conguration pins.
4 CPM multiplication factor = CPM clock/PCI clock
5 CPU multiplication factor = Core PLL multiplication factor
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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