參數(shù)資料
型號： MPC8270CZUUPEA
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 100 MHz, RISC PROCESSOR, PBGA480
封裝： 37 X 37 MM, 1.27 MM PITCH, FTBGA-480
文件頁數(shù)： 76/156頁
文件大?。?/td> 1680K
代理商： MPC8270CZUUPEA
26
MPC8280 PowerQUICC II Family Hardware Specications
MOTOROLA
Clock Conguration Modes
7.2
PCI Host Mode
Table 16 and Table 17 show clock congurations for PCI host mode. The frequencies listed are for the
purpose of illustration only. Users must select a mode and input bus frequency so that the resulting
conguration does not exceed the frequency rating of the user’s device. In addition, note the following:
0111_011
55.5
133.3
3
166.7
400.0
3
166.7
400.0
0111_100
71.4
133.3
3
133.0
400.0
3.5
250.0
466.7
0111_101
62.5
133.3
3
133.0
400.0
4
250.0
533.3
0111_110
55.6
133.3
3
133.0
400.0
4.5
250.0
600.0
0111_111
Reserved
1000_000
Reserved
1000_001
Reserved
1000_010
71.4
114.3
3.5
250.0
400.0
3.5
250.0
400.0
1000_011
62.5
114.3
3.5
218.8
400.0
4
250.0
457.1
1000_100
55.6
114.3
3.5
194.4
400.0
4.5
250.0
514.3
1000_101
50.0
114.3
3.5
175.0
400.0
5
250.0
571.4
1000_110
45.5
114.3
3.5
159.1
400.0
5.5
250.0
628.6
1100_000
Reserved
1100_001
Reserved
1100_010
Reserved
1101_000
Reserved
1 “Low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency guarantees
the required minimum CPU operating frequency. Minimum CPU frequency is determined by the clock mode.
For modes with a CPU multiplication factor
≤ 3, the minimum CPU frequency is 166 MHz. The minimum CPM
frequency is 133 MHz.
For modes with a CPU multiplication factor
≥ 3.5, the minimum CPU frequency is 250 MHz. The minimum CPM
frequency is as shown in the table.
“High” values are for the purpose of illustration only. Users must select a mode and input bus frequency so that the
resulting conguration does not exceed the frequency rating of the user’s device.
2 MODCK_H = hard reset conguration word [28–31]. MODCK[1-3] = three hardware conguration pins.
3 60x and local bus frequency. Identical to CLKIN.
4 CPM multiplication factor = CPM clock/bus clock
5 CPU multiplication factor = Core PLL multiplication factor
Table 15. Clock Congurations for Local Bus Mode1 (Continued)
Mode2
Bus Clock3
(MHz)
CPM
Multiplication
Factor4
CPM Clock
(MHz)
CPU
Multiplication
Factor5
CPU Clock
(MHz)
MODCK_H-MODCK[1-3]
low
high
low
high
low
high
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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