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參數(shù)資料
| 型號： | MPC826XAZUSPUX |
| 廠商： | Motorola, Inc. |
| 英文描述： | MPC826xA (HiP4) Family Hardware Specifications |
| 中文描述： | MPC826xA（HiP4）家庭硬件規(guī)格 |
| 文件頁數(shù)： | 14/48頁 |
| 文件大?。?/td> | 315K |
| 代理商： | MPC826XAZUSPUX |
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MPC826xA (HiP4) Family Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
MOTOROLA
Electrical and Thermal Characteristics
Table 9 lists CPM output characteristics.
Table 10 lists CPM input characteristics.
Note that although the speci
fi
cations generally reference the rising edge of the clock, the following AC
timing diagrams also apply when the falling edge is the active edge.
Figure 2 shows the FCC external clock.
Figure 2. FCC External Clock Diagram
Table 9. AC Characteristics for CPM Outputs
1
1
Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of
the signal. Timings are measured at the pin.
Spec_num
Max/Min
Characteristic
Max Delay (ns)
Min Delay (ns)
66 MHz 83 MHz 66 MHz 83 MHz
sp36a/sp37a FCC outputs—internal clock (NMSI)
6
5.5
1
1
sp36b/sp37b FCC outputs—external clock (NMSI)
14
12
2
1
sp40/sp41
TDM outputs/SI
25
16
5
4
sp38a/sp39a SCC/SMC/SPI/I2C outputs—internal clock (NMSI)
19
16
1
0.5
sp38b/sp39b Ex_SCC/SMC/SPI/I2C outputs—external clock (NMSI)
19
16
2
1
sp42/sp43
PIO/TIMER/DMA outputs
14
11
1
0.5
Table 10. AC Characteristics for CPM Inputs
1
1
Input specifications are measured from the 50% level of the signal to the 50% level of the rising
edge of CLKIN. Timings are measured at the pin.
Spec_num
Characteristic
Setup (ns)
Hold (ns)
66 MHz 83 MHz 66 MHz 83 MHz
sp16a/sp17a
FCC inputs—internal clock (NMSI)
10
8
0
0
sp16b/sp17b
FCC inputs—external clock (NMSI)
3
2.5
3
2
sp20/sp21
TDM inputs/SI
15
12
12
10
sp18a/sp19a
SCC/SMC/SPI/I2C inputs—internal clock (NMSI)
20
16
0
0
sp18b/sp19b
SCC/SMC/SPI/I2C inputs—external clock (NMSI)
5
4
5
4
sp22/sp23
PIO/TIMER/DMA inputs
10
8
3
3
Serial ClKin
FCC input signals
FCC output signals
sp16b
sp17b
sp36b/sp37b
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